[PATCH v2 1/3] riscv: implement __ashldi3, __lshrdi3

[Heinrich Schuchardt]

On 32bit RISC-V calls to __ashrdi3 and __lshrdi3 are generated.
These functions are normally provided by glibc but U-Boot is freestanding
and needs its own implementation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt at canonical.com>
---
v2:
	new patch
---
 arch/riscv/lib/Makefile |  1 +
 arch/riscv/lib/bitops.S | 15 +++++++++++++++
 2 files changed, 16 insertions(+)
 create mode 100644 arch/riscv/lib/bitops.S

diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 06020fcc2a..cfd7a47f65 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -6,6 +6,7 @@
 # Copyright (C) 2017 Andes Technology Corporation
 # Rick Chen, Andes Technology Corporation <rick at andestech.com>
 
+obj-y	+= bitops.o
 obj-$(CONFIG_CMD_BOOTM) += bootm.o
 obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o
 obj-$(CONFIG_CMD_GO) += boot.o
diff --git a/arch/riscv/lib/bitops.S b/arch/riscv/lib/bitops.S
new file mode 100644
index 0000000000..a2a1ab2376
--- /dev/null
+++ b/arch/riscv/lib/bitops.S
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#include <config.h>
+#include <linux/linkage.h>
+
+.pushsection .text.rvbitops, "ax"
+ENTRY(__ashldi3)
+	sll a0, a0, a1
+	ret
+ENDPROC(__ashldi3)
+
+ENTRY(__lshrdi3)
+	srl a0, a0, a1
+	ret
+ENDPROC(__lshrdi3)
-- 
2.37.2