[PATCH 0/3] arm: smh: Fix and improve semihosting traps

[Andre Przywara]

On Wed, 5 Oct 2022 19:41:01 -0400
Sean Anderson <sean.anderson at seco.com> wrote:

Hi Sean,

> On 10/5/22 12:38, Andre Przywara wrote:
> > While playing around with QEMU's semihosting implementation, I stared at
> > our semihosting trap code, and found some issues, that this mini-series
> > fixes.
> > 
> > Please have a look!
> > 
> > Cheers,
> > Andre
> > 
> > Andre Przywara (3):
> >    arm: smh: specify Thumb trap instruction
> >    arm: smh: Make semihosting trap calls more robust
> >    arm: smh: Allow semihosting trap calls to be inlined
> > 
> >   arch/arm/lib/semihosting.c | 44 +++++++++++++++++++++++++++-----------
> >   1 file changed, 31 insertions(+), 13 deletions(-)
> >   
> 
> This all LGTM
> 
> Although I wonder if we should just move smh_trap into an assembly file.
> I think that would apply most of these optimization barriers.

I was already thinking about that, since it's indeed the most clean and
robust solution. But then I didn't want to throw away the hours of
research I put into this, and be it for future reference in
the mailing list archive ;-)
And I really like how the compiler just puts the "hlt" directly into the
generated code. But since it's not performance critical, a function is
just fine.

> Your series will also confict with Kautuk's series [1]. I think the bugs
> you described above will apply to RISC-V as well.

Ah, this now makes the case for an assembly file even bigger, since we now
have only the trap function in a separate file anyway.

I will send something on top of Kautuk's series.

Many thanks for the heads up!

Cheers,
Andre

> 
> --Sean
> 
> [1] https://lore.kernel.org/all/20220923070320.617623-1-kconsul@ventanamicro.com/