[PATCH 1/1] riscv: support building double-float modules

[Heinrich Schuchardt]

On 10/12/22 05:24, Rick Chen wrote:
>> From: Heinrich Schuchardt <heinrich.schuchardt at canonical.com>
>> Sent: Saturday, October 08, 2022 5:18 PM
>> To: Rick Jian-Zhi Chen(陳建志) <rick at andestech.com>; Leo Yu-Chi Liang(梁育齊) <ycliang at andestech.com>
>> Cc: Tom Rini <trini at konsulko.com>; u-boot at lists.denx.de; Heinrich Schuchardt <heinrich.schuchardt at canonical.com>
>> Subject: [PATCH 1/1] riscv: support building double-float modules
>>
>> The riscv32 toolchain for GCC-12 provided by kernel.org contains libgcc.a compiled for double-float. To link to it we have to adjust how we build U-Boot.
>>
>> As U-Boot actually does not use floating point at all this should not make a significant difference for the produced binaries.
>>
>> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt at canonical.com>
>> ---
>>   arch/riscv/Kconfig  | 14 ++++++++++++++  arch/riscv/Makefile | 17 ++++++++++++++---
>>   2 files changed, 28 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 32a90b83b5..8add95c8ef 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -152,6 +152,20 @@ config RISCV_ISA_C
>>            when building U-Boot, which results in compressed instructions in the
>>            U-Boot binary.
>>
>> +config RISCV_ISA_F
>> +       bool "Standard extension for Single-Precision Floating Point"
>> +       default y
> 
> 
> Shall this default y need to depend on RV32 ?

All RV64 boards that we currently support have the F and D extension and 
these extensions are in RV64GC. There is no need to disable the F option 
on RV64.

If you wanted to catch if anybody is using floating point calculation in 
U-Boot, we could let it depend on RV32 until we hit another libgcc pitfall.

Best regards

Heinrich

> 
> Reviewed-by: Rick Chen <rick at andestech.com>
> 
>> +       help
>> +         Adds "F" to the ISA string passed to the compiler.
>> +
>> +config RISCV_ISA_D
>> +       bool "Standard extension forr Double-Precision Floating Point"
>> +       depends on RISCV_ISA_F
>> +       default y
>> +       help
>> +         Adds "D" to the ISA string passed to the compiler and changes the
>> +         riscv32 ABI from ilp32 to ipl32d.
>> +
>>   config RISCV_ISA_A
>>          def_bool y
>>
>> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 53d1194ffb..d1b6e86dd8 100644
>> --- a/arch/riscv/Makefile
>> +++ b/arch/riscv/Makefile
>> @@ -5,15 +5,24 @@
>>
>>   ifeq ($(CONFIG_ARCH_RV64I),y)
>>          ARCH_BASE = rv64im
>> -       ABI = lp64
>> +       ABI_BASE = lp64
>>   endif
>>   ifeq ($(CONFIG_ARCH_RV32I),y)
>>          ARCH_BASE = rv32im
>> -       ABI = ilp32
>> +       ABI_BASE = ilp32
>>   endif
>>   ifeq ($(CONFIG_RISCV_ISA_A),y)
>>          ARCH_A = a
>>   endif
>> +ifeq ($(CONFIG_RISCV_ISA_F),y)
>> +       ARCH_F = f
>> +endif
>> +ifeq ($(CONFIG_RISCV_ISA_D),y)
>> +       ARCH_D = d
>> +ifeq ($(CONFIG_ARCH_RV32I),y)
>> +       ABI_D = d
>> +endif
>> +endif
>>   ifeq ($(CONFIG_RISCV_ISA_C),y)
>>          ARCH_C = c
>>   endif
>> @@ -24,7 +33,9 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
>>          CMODEL = medany
>>   endif
>>
>> -RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C)
>> +
>> +RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)
>> +ABI = $(ABI_BASE)$(ABI_D)
>>
>>   # Newer binutils versions default to ISA spec version 20191213 which moves some  # instructions from the I extension to the Zicsr and Zifencei extensions.
>> --