[PATCH 4/6] sunxi: f1c100: add UART1 support

Jernej Škrabec jernej.skrabec at gmail.com
Wed Oct 19 05:55:19 CEST 2022


Dne torek, 18. oktober 2022 ob 11:23:41 CEST je Andre Przywara napisal(a):
> On 12/10/2022 22:42, Jernej Škrabec wrote:
> 
> Hi Jernej,
> 
> many thanks for the review of this series, that's much appreciated!
> 
> > Dne sreda, 12. oktober 2022 ob 18:34:56 CEST je Andre Przywara napisal(a):
> >> Some boards use UART1 for its debug UART, so define the pins for the SPL
> >> and the pinmux name and mux value for U-Boot proper.
> >> 
> >> Signed-off-by: Andre Przywara <andre.przywara at arm.com>
> >> ---
> >> 
> >>   arch/arm/mach-sunxi/board.c           | 4 ++++
> >>   drivers/pinctrl/sunxi/pinctrl-sunxi.c | 1 +
> >>   2 files changed, 5 insertions(+)
> >> 
> >> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> >> index 62bb40b8c89..77216157908 100644
> >> --- a/arch/arm/mach-sunxi/board.c
> >> +++ b/arch/arm/mach-sunxi/board.c
> >> @@ -147,6 +147,10 @@ static int gpio_init(void)
> >> 
> >>   	sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0);
> >>   	sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0);
> >>   	sunxi_gpio_set_pull(SUNXI_GPH(13), SUNXI_GPIO_PULL_UP);
> >> 
> >> +#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNIV)
> >> +	sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPE_UART0);
> >> +	sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPE_UART0);
> >> +	sunxi_gpio_set_pull(SUNXI_GPA(3), SUNXI_GPIO_PULL_UP);
> >> 
> >>   #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
> >>   
> >>   	sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
> >>   	sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
> >> 
> >> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> >> b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 9ce2bc1b3af..061104be056
> >> 100644
> >> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> >> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> >> @@ -245,6 +245,7 @@ static const struct sunxi_pinctrl_function
> >> suniv_f1c100s_pinctrl_functions[] = { #else
> >> 
> >>   	{ "uart0",	5 },	/* PE0-PE1 */
> >>   
> >>   #endif
> >> 
> >> +	{ "uart1",	5 },	/* PA0-PA3 */
> > 
> > Comment should be PA2-PA3. With that fixed:
> Well, PA0 and PA1 are RTS and CTS for UART1, so if you don't mind, I
> will keep it like this. Not that the comment really matters anyway ;-)

Ok.

Best regards,
Jernej

> 
> Cheers,
> Andre
> 
> > Reviewed-by: Jernej Skrabec <jernej.skrabec at gmail.com>
> > 
> > Best regards,
> > Jernej
> > 
> >>   };
> >>   
> >>   static const struct sunxi_pinctrl_desc __maybe_unused
> >> 
> >> suniv_f1c100s_pinctrl_desc = { --
> >> 2.25.1






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