[PATCH 2/4] riscv: dts: Add QSPI NAND device node

[Padmarao.Begari at microchip.com]

Hi Conor,

> On Wed, 2022-10-19 at 16:59 +0100, Conor Dooley wrote:
> 
> On Wed, Oct 19, 2022 at 08:23:20PM +0530, Padmarao Begari wrote:
> 
> > riscv: dts: Add QSPI NAND device node
> 
> I didn't notice this on 1/3, but I think we need to mention which
> board
> that this is being added for in the shortlog.

Ok, will board details.

Regards
Padmarao
> Thanks,
> Conor.
> 
> > Add QSPI NAND device node to the Microchip PolarFire SoC
> > Icicle kit device tree
> > 
> > Signed-off-by: Padmarao Begari <padmarao.begari at microchip.com>
> > ---
> >  arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts
> > b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts
> > index 876c475069..679221e13f 100644
> > --- a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts
> > +++ b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts
> > @@ -18,6 +18,7 @@
> >       aliases {
> >               serial1 = &uart1;
> >               ethernet0 = &mac1;
> > +             spi0 = &qspi;
> >       };
> > 
> >       chosen {
> > @@ -113,3 +114,17 @@
> >               ti,fifo-depth = <0x1>;
> >       };
> >  };
> > +
> > +&qspi {
> > +     status = "okay";
> > +     num-cs = <1>;
> > +     flash0: spi-nand at 0 {
> > +             compatible = "spi-nand";
> > +             reg = <0x0>;
> > +             spi-tx-bus-width = <4>;
> > +             spi-rx-bus-width = <4>;
> > +             spi-max-frequency = <20000000>;
> > +             spi-cpol;
> > +             spi-cpha;
> > +     };
> > +};
> > --
> > 2.25.1
> >