[PATCH v3 11/19] imx: kontron-sl-mx8mm: Remove 100mt DDR setpoint

[Tim Harvey]

On Mon, Oct 24, 2022 at 4:54 AM Frieder Schrempf
<frieder.schrempf at kontron.de> wrote:
>
> Hi Tim,
>
> On 21.10.22 21:24, Tim Harvey wrote:
> > On Wed, Aug 24, 2022 at 7:01 AM Frieder Schrempf <frieder at fris.de> wrote:
> >>
> >> From: Frieder Schrempf <frieder.schrempf at kontron.de>
> >>
> >> The new stable configuration is missing the 100mt setpoint, remove
> >> it before updating the config to make sure the changes are separated
> >> cleanly.
> >>
> >> Signed-off-by: Frieder Schrempf <frieder.schrempf at kontron.de>
> >> Reviewed-by: Fabio Estevam <festevam at denx.de>
> >> ---
> >
> > Frieder,
> >
> > I just noticed this patch and was curious what it was about.
> >
> > What do you mean by 'the new stable configuration is missing the 100mt
> > setpoint'? Does this refer to something NXP has changed in their DDR
> > config tools?
>
> At some point we started using 4GB LPDDR4 chips from Nanya on our SoMs
> while before we only had Micron chips. For some unknown reason (NXP
> couldn't explain it either), the only configuration that works for all
> used chips (Micron and Nanya) is only stable if the lowest of the three
> frequency setpoints is removed.
>
> Unfortunately I have no idea how this behavior could be explained.
>

Frieder,

Ok - thanks for the explanation. I'm looking for ways to reduce the
SPL impact of DRAM configs as I have 4 of them for imx8mm-venice that
are keeping me from adding SDP support due to SPL size.

I wonder if binman and linker labels could be used to load dram configs.

Best Regards,

Tim