[PATCH] ARM: zynq: DT: Enable all FCLKs by default

[Michal Simek]

On 10/12/22 11:30, Michal Simek wrote:
> From: Christian Kohn <christian.kohn at xilinx.com>
> 
> The fclk-enable property is set to 0 which disables all FCLKs.
> Enable all FCLKs so they can be used as clock sources in the
> programmable logic.
> 
> Signed-off-by: Christian Kohn <christian.kohn at xilinx.com>
> Acked-by: Soren Brinkmann <soren.brinkmann at xilinx.com>
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
> 
>   arch/arm/dts/zynq-7000.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
> index edc147d63f1e..f72ef526f057 100644
> --- a/arch/arm/dts/zynq-7000.dtsi
> +++ b/arch/arm/dts/zynq-7000.dtsi
> @@ -340,7 +340,7 @@
>   				u-boot,dm-pre-reloc;
>   				#clock-cells = <1>;
>   				compatible = "xlnx,ps7-clkc";
> -				fclk-enable = <0>;
> +				fclk-enable = <0xf>;
>   				clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
>   						"cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
>   						"dci", "lqspi", "smc", "pcap", "gem0", "gem1",

Applied.
M