[PATCH 3/3] timer: xilinx-timer: use timer_conv_64() to fix timer wrap around
Michal Simek
michal.simek at amd.com
Tue Oct 25 11:32:48 CEST 2022
On 10/12/22 07:36, Ovidiu Panait wrote:
> Current xilinx_timer_get_count() implementation does not take into account
> the periodic 32-bit wrap arounds, as it directly returns the 32-bit counter
> register value. The roll-overs cause problems in the upper timer layers, as
> generic timer code expects an incrementing 64-bit value from get_count() to
> work correctly.
>
> Add the missing 64-bit up-conversion to fix random hangs/delays in
> __udelay().
>
> Fixes: a36d86720f ("microblaze: Convert axi timer to DM driver")
> Signed-off-by: Ovidiu Panait <ovpanait at gmail.com>
> ---
>
> drivers/timer/xilinx-timer.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/timer/xilinx-timer.c b/drivers/timer/xilinx-timer.c
> index 75b4473b63..172fd9f929 100644
> --- a/drivers/timer/xilinx-timer.c
> +++ b/drivers/timer/xilinx-timer.c
> @@ -40,7 +40,7 @@ static u64 xilinx_timer_get_count(struct udevice *dev)
>
> regmap_read(priv->regs, TIMER_COUNTER_OFFSET, &value);
>
> - return value;
> + return timer_conv_64(value);
> }
>
> static int xilinx_timer_probe(struct udevice *dev)
Applied all.
M
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