[PATCH v5 2/2] serial: mxc: have putc use the TXFIFO

[Tim Harvey]

On Tue, Sep 6, 2022 at 5:15 AM Johannes Schneider
<johannes.schneider at leica-geosystems.com> wrote:
>
> only waiting for TXEMPTY leads to corrupted messages going over the
> wire - which is fixed by making use of the FIFO
>
> this change is following the linux kernel uart driver
> (drivers/tty/serial/imx.c), which also checks UTS_TXFULL
> instead of UTS_TXEMPTY
>
> Signed-off-by: Johannes Schneider <johannes.schneider at leica-geosystems.com>
> Reviewed-by: Peng Fan <peng.fan at nxp.com>
> Reviewed-by: Fabio Estevam <festevam at denx.de>
> ---
>
> (no changes since v1)
>
>  drivers/serial/serial_mxc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
> index ee17a960d4..af1fd1ea9b 100644
> --- a/drivers/serial/serial_mxc.c
> +++ b/drivers/serial/serial_mxc.c
> @@ -311,7 +311,7 @@ static int mxc_serial_putc(struct udevice *dev, const char ch)
>         struct mxc_serial_plat *plat = dev_get_plat(dev);
>         struct mxc_uart *const uart = plat->reg;
>
> -       if (!(readl(&uart->ts) & UTS_TXEMPTY))
> +       if (readl(&uart->ts) & UTS_TXFULL)
>                 return -EAGAIN;
>
>         writel(ch, &uart->txd);
> --
> 2.25.1
>

Johannes,

Since this patch I find an issue with an IMX6 board of mine gwventana:

Prior to this patch the board boots with:
DRAM:  1 GiB
GSCv2   : v52 0x9981 RST:VIN WDT:disabled board_temp:43C
RTC     : 1970-01-01   0:56:15 UTC
Core:  67 devices, 22 uclasses, devicetree: separate
WDT:   Started watchdog at 20bc000 with servicing every 1000ms (60s timeout)
NAND:  2048 MiB
...

and following this patch I get:
...
DRAM:  1 GiB
GSCv2   : v52 0x9981 RST:VIN WDT:disabled board_temp:29C
RTC     : 1970-01-01   ~�KW�'$H�$V�W��Y.KH�� uclasses, devicetree: separate
WDT:   Started watchdog at 20bc000 with servicing every 1000ms (60s timeout)
NAND:  2048 MiB
...

The RTC line is displayed from drivers/misc/gsc.c and the Core: comes
from dm_announce. Somehow in between the FIFO does not get drained
before dm_announce gets called.

Adding a delay after the RTC print or reverting this patch.

Any ideas?

Best Regards,

Tim