[PATCH] drivers: pci: pcie_dw_common: add upper-limit to iATU

[Ben Dooks]

On 20/10/2022 17:13, Bin Meng wrote:
> Hi Ben,
> 
> On Thu, Oct 20, 2022 at 11:51 PM Ben Dooks <ben.dooks at sifive.com> wrote:
>>
>> The 4.6 spec added an upper 32bits to the ATU limit, and since this
>> driver is already assuming the unrolled feature added in the 4.8
>> specification this really should be set.
>>
>> This is causing a bug with testing against the QEMU model as it
> 
> I guess you are testing QEMU sifive_u machine with some mods to add a
> DW PCIe controller, with U-Boot sifive_unmatched defconfig?
> 
> Could you please document the QEMU command line in the commit message?

Your guess is wrong, I'm not currently using the sifive_u. This is a
test projec to test some of the work we've been doing updating the
dw-pcie code for future work.

I'll try and sort out adding this to the sifive_u as an option but I
expect that won't be until next week.

I am wondering whether to add a flag to say use viewport 2 for
the config, as logging from the dw-pcie model is showing a lot of
updates to windows setting, then restoring the IO view and I am
guessing people aren't configuring minimal settings on the Synopsys
designs...

>> defaults the viewports to fully open and not setting this causes
>> the config viewport to become most of memory (obviously stopping
>> the emulated system working correctly)
>>
>> Signed-off-by: Ben Dooks <ben.dooks at sifive.com>
>> ---
>>   drivers/pci/pcie_dw_common.c | 2 ++
>>   drivers/pci/pcie_dw_common.h | 1 +
>>   2 files changed, 3 insertions(+)
>>
>> diff --git a/drivers/pci/pcie_dw_common.c b/drivers/pci/pcie_dw_common.c
>> index e66fb1490a..9f8b016d11 100644
>> --- a/drivers/pci/pcie_dw_common.c
>> +++ b/drivers/pci/pcie_dw_common.c
>> @@ -73,6 +73,8 @@ int pcie_dw_prog_outbound_atu_unroll(struct pcie_dw *pci, int index,
>>                                   upper_32_bits(cpu_addr));
>>          dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LIMIT,
>>                                   lower_32_bits(cpu_addr + size - 1));
>> +       dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_LIMIT,
>> +                                upper_32_bits(cpu_addr + size - 1));
>>          dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET,
>>                                   lower_32_bits(pci_addr));
>>          dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET,
>> diff --git a/drivers/pci/pcie_dw_common.h b/drivers/pci/pcie_dw_common.h
>> index 60bf966d5e..8ec6834fa1 100644
>> --- a/drivers/pci/pcie_dw_common.h
>> +++ b/drivers/pci/pcie_dw_common.h
>> @@ -32,6 +32,7 @@
>>   #define PCIE_ATU_UNR_LIMIT             0x10
>>   #define PCIE_ATU_UNR_LOWER_TARGET      0x14
>>   #define PCIE_ATU_UNR_UPPER_TARGET      0x18
>> +#define PCIE_ATU_UNR_UPPER_LIMIT       0x20
>>
>>   #define PCIE_ATU_REGION_INDEX2         (0x2 << 0)
>>   #define PCIE_ATU_REGION_INDEX1         (0x1 << 0)
>> --
> 
> Regards,
> Bin