[PATCH v3 0/4] Update Microchip PolarFire SoC

[Padmarao Begari]

This patch set updates Microchip PolarFire SoC Icicle Kit support
of RISC-V U-Boot.

The patches are based upon latest U-Boot tree
(https://source.denx.de/u-boot/u-boot) at commit id
8bc87a4c55a1723728374a5643f13bced37dad6b

The memory device node is updated based on the latest FPGA reference
design v2022.10 and a small 4MB reservation is made at the end of 32-bit
DDR to provide some memory for the HSS to use, add Microchip QSPI driver.

Changes in v3:
- Add reference design campatible in the device tree
- Change QSPI time out value to 500ms(as per Linux)
- Fix some typos

Changes in v2:
- Add Co-developed-by with patch
- Replace spi-nand with flash in device node
- Add board details for QSPI NAND
- Rename QSPI driver file with microchip-coreqspi
- Add microchip,coreqspi-rtl-v2 to the compatible list
- Use MICROCHIP_COREQSPI instead of MICROCHIP_QSPI in kconfig

Padmarao Begari (4):
  riscv: dts: Update memory configuration
  riscv: dts: Add QSPI NAND device node
  spi: Add Microchip PolarFire SoC QSPI driver
  riscv: Update Microchip MPFS Icicle Kit support

 arch/riscv/dts/microchip-mpfs-icicle-kit.dts |  91 ++--
 board/microchip/mpfs_icicle/Kconfig          |   7 +
 configs/microchip_mpfs_icicle_defconfig      |   1 +
 drivers/spi/Kconfig                          |   6 +
 drivers/spi/Makefile                         |   1 +
 drivers/spi/microchip_coreqspi.c             | 505 +++++++++++++++++++
 6 files changed, 553 insertions(+), 58 deletions(-)
 create mode 100644 drivers/spi/microchip_coreqspi.c

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2.25.1