[PATCH 1/1] The riscv spec has breaking change from 2.2 to 20191213. ...

[Heinrich Schuchardt]

On 8/30/22 01:51, Pan Li wrote:
 > The riscv spec has breaking change from 2.2 to 20191213.
 > Both ZICSR and ZIFENCEI are separated extension since 20191213.
 > Gcc bump up the riscv spec to 20191213 since 12.x.
 > So add below 4 build option for compatibility::

Hello Pan,

thank you for addressing this problem.

Nits:
You ultra long subject should have been in the commit message.

Alexandre has suggested in his patch
[PATCH] riscv: Fix build against binutils 2.38
https://lore.kernel.org/u-boot/20220128134713.2322800-1-alexandre.ghiti@canonical.com/

to determine the ISA settings for building at runtime.

For a user it is preferable to use ready-made defconfigs with having to 
adjust each build manually. This is why I think we should follow 
Alexandre's approach.

On 8/30/22 01:51, Pan Li wrote:
> CONFIG_RISCV_ISA_F for single float point, default no.
> CONFIG_RISCV_ISA_D for double float point, default no.
> CONFIG_RISCV_ISA_ZICSR for control and status register, default no.
> CONFIG_RISCV_ISA_ZIFENCEI for instruction-fetch fence, default no.


I think defaults should reflect the newest and not the eldest build 
chains. This will provide better long term stability.

Best regards

Heinrich

> 
> Example when build with gcc 12.x as below.
> 
>      make qemu-riscv64_defconfig && make \
>          CROSS_COMPILE=riscv64-linux-gnu- ARCH=riscv \
>          CONFIG_RISCV_ISA_F=y \
>          CONFIG_RISCV_ISA_D=y \
>          CONFIG_RISCV_ISA_ZICSR=y \
>          CONFIG_RISCV_ISA_ZIFENCEI=y
> 
> Signed-off-by: Pan Li <incarnation.p.lee at outlook.com>
> ---
> 
>   arch/riscv/Kconfig  | 28 ++++++++++++++++++++++++++++
>   arch/riscv/Makefile | 20 ++++++++++++++++++--
>   2 files changed, 46 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 78e964db12..d54ee3aaf3 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -144,6 +144,34 @@ config SPL_RISCV_SMODE
>   
>   endchoice
>   
> +config RISCV_ISA_F
> +	bool "Single precision instructions"
> +	help
> +	  Adds "F" to the ISA subsets that the toolchain is allowed to emit
> +	  when building U-Boot, which results in single precision floating point
> +	  instructions in the U-Boot binary.
> +
> +config RISCV_ISA_D
> +	bool "Double precision instructions"
> +	help
> +	  Adds "D" to the ISA subsets that the toolchain is allowed to emit
> +	  when building U-Boot, which results in double precision floating point
> +	  instructions in the U-Boot binary.
> +
> +config RISCV_ISA_ZICSR
> +	bool "Control and status register instructions"
> +	help
> +	  Adds "ZICSR" to the ISA subsets that the toolchain is allowed to emit
> +	  when building U-Boot, which results in control and status Register
> +	  instructions in the U-Boot binary, since gcc 12.x and riscv spec 20191213.
> +
> +config RISCV_ISA_ZIFENCEI
> +	bool "Instruction-fetch fence instructions"
> +	help
> +	  Adds "ZIFENCEI" to the ISA subsets that the toolchain is allowed to emit
> +	  when building U-Boot, which results in instruction-fetch fence instructions
> +	  in the U-Boot binary, since gcc 12.x and riscv spec 20191213.
> +
>   config RISCV_ISA_C
>   	bool "Emit compressed instructions"
>   	default y
> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> index 0b80eb8d86..d333af92d1 100644
> --- a/arch/riscv/Makefile
> +++ b/arch/riscv/Makefile
> @@ -14,9 +14,25 @@ endif
>   ifeq ($(CONFIG_RISCV_ISA_A),y)
>   	ARCH_A = a
>   endif
> +ifeq ($(CONFIG_RISCV_ISA_F),y)
> +	ARCH_F = f
> +ifneq ($(CONFIG_RISCV_ISA_D),y)
> +	ABI_FP_SUFFIX = $(ARCH_F)
> +endif
> +endif
> +ifeq ($(CONFIG_RISCV_ISA_D),y)
> +	ARCH_D = d
> +	ABI_FP_SUFFIX = $(ARCH_D)
> +endif
>   ifeq ($(CONFIG_RISCV_ISA_C),y)
>   	ARCH_C = c
>   endif
> +ifeq ($(CONFIG_RISCV_ISA_ZICSR),y)
> +	ARCH_ZICSR = _zicsr
> +endif
> +ifeq ($(CONFIG_RISCV_ISA_ZIFENCEI),y)
> +	ARCH_ZIFENCEI = _zifencei
> +endif
>   ifeq ($(CONFIG_CMODEL_MEDLOW),y)
>   	CMODEL = medlow
>   endif
> @@ -24,8 +40,8 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
>   	CMODEL = medany
>   endif
>   
> -ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
> -	     -mcmodel=$(CMODEL)
> +ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)$(ARCH_ZICSR)$(ARCH_ZIFENCEI) \
> +	-mabi=$(ABI)$(ABI_FP_SUFFIX) -mcmodel=$(CMODEL)
>   
>   PLATFORM_CPPFLAGS	+= $(ARCH_FLAGS)
>   CFLAGS_EFI		+= $(ARCH_FLAGS)