[PATCH 1/2] HSD #1507453717: arm: socfpga: stratix10: add QSPI boot feature

[Jit Loon Lim]

From: "Ooi, Joyce" <joyce.ooi at intel.com>

This patch adds the QSPI boot feature for Stratix10

Signed-off-by: Ooi, Joyce <joyce.ooi at intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim at intel.com>
---
 arch/arm/dts/Makefile                         |  3 +-
 arch/arm/dts/socfpga_stratix10_socdk_qspi.dts | 14 ++++
 configs/socfpga_stratix10_qspi_defconfig      | 73 +++++++++++++++++++
 include/configs/socfpga_soc64_common.h        |  8 ++
 4 files changed, 97 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/socfpga_stratix10_socdk_qspi.dts
 create mode 100644 configs/socfpga_stratix10_qspi_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ceaa39e4b4..c58acb480d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -436,7 +436,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA) +=				\
 	socfpga_cyclone5_sr1500.dtb			\
 	socfpga_cyclone5_vining_fpga.dtb		\
 	socfpga_n5x_socdk.dtb				\
-	socfpga_stratix10_socdk.dtb
+	socfpga_stratix10_socdk.dtb			\
+	socfpga_stratix10_socdk_qspi.dtb
 
 dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb	\
 	dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb
diff --git a/arch/arm/dts/socfpga_stratix10_socdk_qspi.dts b/arch/arm/dts/socfpga_stratix10_socdk_qspi.dts
new file mode 100644
index 0000000000..729b9e5b84
--- /dev/null
+++ b/arch/arm/dts/socfpga_stratix10_socdk_qspi.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation
+ */
+
+#include "socfpga_stratix10_socdk.dts"
+#include "socfpga_stratix10_socdk-u-boot.dtsi"
+
+/ {
+	chosen {
+		u-boot,boot0 = <&flash0>;
+	};
+
+};
diff --git a/configs/socfpga_stratix10_qspi_defconfig b/configs/socfpga_stratix10_qspi_defconfig
new file mode 100644
index 0000000000..ebeecf0233
--- /dev/null
+++ b/configs/socfpga_stratix10_qspi_defconfig
@@ -0,0 +1,73 @@
+CONFIG_ARM=y
+CONFIG_ARM_SMCCC=y
+CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_TEXT_BASE=0x1000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x02080000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_TEXT_BASE=0xFFE00000
+CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
+CONFIG_IDENT_STRING="socfpga_stratix10"
+CONFIG_SPL_FS_FAT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_ARMV8_PSCI=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk_qspi"
+CONFIG_QSPI_BOOT=y
+CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="earlycon panic=-1"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="sf probe;run qspiload;run linux_qspi_enable;rsu dtb;run qspiboot"
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_BLK=y
+CONFIG_SPL_ALTERA_SDRAM=y
+CONFIG_FPGA_INTEL_PR=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+# CONFIG_MMC is not set
+CONFIG_MTD=y
+CONFIG_SF_DEFAULT_MODE=0x2003
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_MII=y
+CONFIG_DM_RESET=y
+CONFIG_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_DESIGNWARE_WATCHDOG=y
+CONFIG_WDT=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_PANIC_HANG=y
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 06198ddd82..c966d31362 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -37,6 +37,14 @@
  * Environment variable
  */
 #define CONFIG_EXTRA_ENV_SETTINGS \
+	"qspibootimageaddr=0x020B0000\0" \
+	"qspifdtaddr=0x02090000\0" \
+	"bootimagesize=0x01400000\0" \
+	"fdtimagesize=0x00010000\0" \
+	"qspiload=sf read ${loadaddr} ${qspibootimageaddr} ${bootimagesize};" \
+		"sf read ${fdt_addr} ${qspifdtaddr} ${fdtimagesize}\0" \
+	"qspiboot=setenv bootargs earlycon root=/dev/mtdblock1 rw " \
+		"rootfstype=jffs2 rootwait;booti ${loadaddr} - ${fdt_addr}\0" \
 	"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
 	"bootfile=" CONFIG_BOOTFILE "\0" \
 	"fdt_addr=8000000\0" \
-- 
2.26.2