[PULL] u-boot-riscv/master

Leo Liang ycliang at andestech.com
Tue Sep 6 08:07:36 CEST 2022


Hi Tom,

The following changes since commit 427aa3c9b72b6672f714389a6f71b6cc2841d559:

  Merge tag 'tpm-03092022' of https://source.denx.de/u-boot/custodians/u-boot-tpm (2022-09-03 14:55:37 -0400)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-riscv.git

for you to fetch changes up to 4a98207b2335b7108e964b831dc92f0333346c87:

  RISC-V: enable CONFIG_SYSRESET_SBI by default (2022-09-06 13:00:58 +0800)

CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/13361

----------------------------------------------------------------
Heinrich Schuchardt (2):
      cmd/sbi: format KVM version
      RISC-V: enable CONFIG_SYSRESET_SBI by default

Icenowy Zheng (2):
      dt-bindings: clock: sifive: sync FU740 PRCI clock binding header
      riscv: dts: sifive: Synchronize FU740 and Unmatched DT

Jessica Clarke (1):
      riscv: dts: Sync important Unmatched pmic and qspi0 changes from Linux

 arch/riscv/dts/fu740-c000-u-boot.dtsi         | 16 ++---
 arch/riscv/dts/fu740-c000.dtsi                | 91 +++++++++++++------------
 arch/riscv/dts/hifive-unmatched-a00.dts       | 95 ++++++++++++---------------
 cmd/riscv/sbi.c                               | 14 +++-
 drivers/clk/sifive/fu740-prci.c               | 18 ++---
 drivers/clk/sifive/sifive-prci.c              |  4 +-
 drivers/sysreset/Kconfig                      |  1 +
 include/dt-bindings/clock/sifive-fu740-prci.h | 25 ++++---
 8 files changed, 129 insertions(+), 135 deletions(-)

Best regards,
Leo


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