[PATCH v2 09/11] arm: dts: rockchip: sync rk3066/rk3188 DT files from Linux

[Kever Yang]

Hi Johan,

On 2022/9/4 19:04, Johan Jonker wrote:
> Hi Kever,
>
> Despite you marked this serie as "Rejected" this patch contains a normal sync from Linux and therefore can be applied independently.
> Could you a have a look at it again?

Please send the patches for sync dts with linux  by a new patch set.


Thanks,

- Kever

>
> Kind regards,
>
> Johan Jonker
>
> On 7/9/22 20:50, Johan Jonker wrote:
>> Sync rk3066/rk3188 DT files from Linux.
>> This is the state as of v5.18 in Linux +
>> nfc node for MK808 rk3066a.
>> CRU nodes now have a clock property.
>> To prefend dtoc errors a fixed clock must also be
>> included for tpl/spl in the rk3xxx-u-boot.dtsi file.
>>
>> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
>> ---
>>   arch/arm/dts/rk3066a-mk808.dts    | 18 ++++++++++++++++++
>>   arch/arm/dts/rk3066a.dtsi         |  3 ++-
>>   arch/arm/dts/rk3188-radxarock.dts |  3 +--
>>   arch/arm/dts/rk3188.dtsi          | 24 +++++++++++++++---------
>>   arch/arm/dts/rk3xxx-u-boot.dtsi   |  4 ++++
>>   5 files changed, 40 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm/dts/rk3066a-mk808.dts b/arch/arm/dts/rk3066a-mk808.dts
>> index 667d57a4..cfa318a5 100644
>> --- a/arch/arm/dts/rk3066a-mk808.dts
>> +++ b/arch/arm/dts/rk3066a-mk808.dts
>> @@ -160,6 +160,24 @@
>>   	status = "okay";
>>   };
>>   
>> +&nfc {
>> +	#address-cells = <1>;
>> +	#size-cells = <0>;
>> +	status = "okay";
>> +
>> +	nand at 0 {
>> +		reg = <0>;
>> +		label = "rk-nand";
>> +		nand-bus-width = <8>;
>> +		nand-ecc-mode = "hw";
>> +		nand-ecc-step-size = <1024>;
>> +		nand-ecc-strength = <40>;
>> +		nand-is-boot-medium;
>> +		rockchip,boot-blks = <8>;
>> +		rockchip,boot-ecc-strength = <24>;
>> +	};
>> +};
>> +
>>   &pinctrl {
>>   	usb-host {
>>   		host_drv: host-drv {
>> diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi
>> index c25b9695..de9915d9 100644
>> --- a/arch/arm/dts/rk3066a.dtsi
>> +++ b/arch/arm/dts/rk3066a.dtsi
>> @@ -202,8 +202,9 @@
>>   	cru: clock-controller at 20000000 {
>>   		compatible = "rockchip,rk3066a-cru";
>>   		reg = <0x20000000 0x1000>;
>> +		clocks = <&xin24m>;
>> +		clock-names = "xin24m";
>>   		rockchip,grf = <&grf>;
>> -
>>   		#clock-cells = <1>;
>>   		#reset-cells = <1>;
>>   		assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
>> diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts
>> index e7138a4a..a9ed3cd2 100644
>> --- a/arch/arm/dts/rk3188-radxarock.dts
>> +++ b/arch/arm/dts/rk3188-radxarock.dts
>> @@ -6,7 +6,6 @@
>>   /dts-v1/;
>>   #include <dt-bindings/input/input.h>
>>   #include "rk3188.dtsi"
>> -#include "rk3188-radxarock-u-boot.dtsi"
>>   
>>   / {
>>   	model = "Radxa Rock";
>> @@ -25,7 +24,7 @@
>>   		compatible = "gpio-keys";
>>   		autorepeat;
>>   
>> -		power {
>> +		key-power {
>>   			gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
>>   			linux,code = <KEY_POWER>;
>>   			label = "GPIO Key Power";
>> diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
>> index 9a80f83a..cdd4a0bd 100644
>> --- a/arch/arm/dts/rk3188.dtsi
>> +++ b/arch/arm/dts/rk3188.dtsi
>> @@ -54,7 +54,7 @@
>>   		};
>>   	};
>>   
>> -	cpu0_opp_table: opp_table0 {
>> +	cpu0_opp_table: opp-table-0 {
>>   		compatible = "operating-points-v2";
>>   		opp-shared;
>>   
>> @@ -195,8 +195,9 @@
>>   	cru: clock-controller at 20000000 {
>>   		compatible = "rockchip,rk3188-cru";
>>   		reg = <0x20000000 0x1000>;
>> +		clocks = <&xin24m>;
>> +		clock-names = "xin24m";
>>   		rockchip,grf = <&grf>;
>> -
>>   		#clock-cells = <1>;
>>   		#reset-cells = <1>;
>>   	};
>> @@ -223,7 +224,7 @@
>>   		#size-cells = <1>;
>>   		ranges;
>>   
>> -		gpio0: gpio0 at 2000a000 {
>> +		gpio0: gpio at 2000a000 {
>>   			compatible = "rockchip,rk3188-gpio-bank0";
>>   			reg = <0x2000a000 0x100>;
>>   			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
>> @@ -236,7 +237,7 @@
>>   			#interrupt-cells = <2>;
>>   		};
>>   
>> -		gpio1: gpio1 at 2003c000 {
>> +		gpio1: gpio at 2003c000 {
>>   			compatible = "rockchip,gpio-bank";
>>   			reg = <0x2003c000 0x100>;
>>   			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
>> @@ -249,7 +250,7 @@
>>   			#interrupt-cells = <2>;
>>   		};
>>   
>> -		gpio2: gpio2 at 2003e000 {
>> +		gpio2: gpio at 2003e000 {
>>   			compatible = "rockchip,gpio-bank";
>>   			reg = <0x2003e000 0x100>;
>>   			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
>> @@ -262,7 +263,7 @@
>>   			#interrupt-cells = <2>;
>>   		};
>>   
>> -		gpio3: gpio3 at 20080000 {
>> +		gpio3: gpio at 20080000 {
>>   			compatible = "rockchip,gpio-bank";
>>   			reg = <0x20080000 0x100>;
>>   			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
>> @@ -275,15 +276,15 @@
>>   			#interrupt-cells = <2>;
>>   		};
>>   
>> -		pcfg_pull_up: pcfg_pull_up {
>> +		pcfg_pull_up: pcfg-pull-up {
>>   			bias-pull-up;
>>   		};
>>   
>> -		pcfg_pull_down: pcfg_pull_down {
>> +		pcfg_pull_down: pcfg-pull-down {
>>   			bias-pull-down;
>>   		};
>>   
>> -		pcfg_pull_none: pcfg_pull_none {
>> +		pcfg_pull_none: pcfg-pull-none {
>>   			bias-disable;
>>   		};
>>   
>> @@ -641,6 +642,11 @@
>>   &grf {
>>   	compatible = "rockchip,rk3188-grf", "syscon", "simple-mfd";
>>   
>> +	io_domains: io-domains {
>> +		compatible = "rockchip,rk3188-io-voltage-domain";
>> +		status = "disabled";
>> +	};
>> +
>>   	usbphy: usbphy {
>>   		compatible = "rockchip,rk3188-usb-phy";
>>   		#address-cells = <1>;
>> diff --git a/arch/arm/dts/rk3xxx-u-boot.dtsi b/arch/arm/dts/rk3xxx-u-boot.dtsi
>> index e67432fb..c77d1fae 100644
>> --- a/arch/arm/dts/rk3xxx-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3xxx-u-boot.dtsi
>> @@ -33,3 +33,7 @@
>>   &uart2 {
>>   	clock-frequency = <24000000>;
>>   };
>> +
>> +&xin24m {
>> +	u-boot,dm-pre-reloc;
>> +};