[PATCH] arm: socfpga: Remove confusing timer related words from watchdog reset

[teik.heng.chong at intel.com]

From: Tien Fong Chee <tien.fong.chee at intel.com>

It's confusing to have timer related words along with watchdog reset
dessert function, because the function is only release watchdog from
reset, so it has no related to any timer setting.

Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
Signed-off-by: Teik Heng Chong <teik.heng.chong at intel.com>
---
 arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h | 2 +-
 arch/arm/mach-socfpga/reset_manager_arria10.c              | 4 ++--
 arch/arm/mach-socfpga/spl_a10.c                            | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
index 26faa628a0..9aacf3e2c6 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
@@ -12,7 +12,7 @@
 void socfpga_watchdog_disable(void);
 void socfpga_reset_deassert_noc_ddr_scheduler(void);
 int socfpga_reset_deassert_bridges_handoff(void);
-void socfpga_reset_deassert_osc1wd0(void);
+void socfpga_reset_deassert_wd0(void);
 int socfpga_bridges_reset(void);
 
 #define RSTMGR_A10_STATUS	0x00
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index 27c0308011..13a5cf314b 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -109,8 +109,8 @@ int socfpga_reset_deassert_bridges_handoff(void)
 				 mask_noc, false, 1000, false);
 }
 
-/* Release L4 OSC1 Watchdog Timer 0 from reset through reset manager */
-void socfpga_reset_deassert_osc1wd0(void)
+/* Release Watchdog 0 from reset through reset manager */
+void socfpga_reset_deassert_wd0(void)
 {
 	clrbits_le32(socfpga_get_rstmgr_addr() + RSTMGR_A10_PER1MODRST,
 		     ALT_RSTMGR_PER1MODRST_WD0_SET_MSK);
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index ec67a5b0eb..96bad162df 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -263,8 +263,8 @@ void board_init_f(ulong dummy)
 	cm_basic_init(gd->fdt_blob);
 
 #ifdef CONFIG_HW_WATCHDOG
-	/* release osc1 watchdog timer 0 from reset */
-	socfpga_reset_deassert_osc1wd0();
+	/* release watchdog 0 from reset */
+	socfpga_reset_deassert_wd0();
 
 	/* reconfigure and enable the watchdog */
 	hw_watchdog_init();
-- 
2.25.1