[PATCH] rkspi: only enable padding quirk on SoCs which need it
Lorenz Brun
lorenz at brun.one
Tue Sep 20 00:55:54 CEST 2022
The workaround for the Mask ROM bug in a lot of Rockchip SoCs is applied
unconditionally, but at least on the RK3328 it is not needed and causes
a boot failure if applied.
Make a new column in the SoC feature description and skip the workaround
if the SoC doesn't need it.
Signed-off-by: Lorenz Brun <lorenz at brun.one>
---
tools/rkcommon.c | 35 ++++++++++++++++++++++-------------
tools/rkcommon.h | 9 +++++++++
tools/rkspi.c | 6 ++++++
3 files changed, 37 insertions(+), 13 deletions(-)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 0db45c2d41..4b4de24f21 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -118,22 +118,24 @@ struct spl_info {
const uint32_t spl_size;
const bool spl_rc4;
const uint32_t header_ver;
+ const bool has_spi_halfblock_quirk;
};
+// Note: has_spi_halfblock_quirk is not certain on all SoCs.
static struct spl_info spl_infos[] = {
- { "px30", "RK33", 0x2800, false, RK_HEADER_V1 },
- { "rk3036", "RK30", 0x1000, false, RK_HEADER_V1 },
- { "rk3066", "RK30", 0x8000 - 0x800, true, RK_HEADER_V1 },
- { "rk3128", "RK31", 0x1800, false, RK_HEADER_V1 },
- { "rk3188", "RK31", 0x8000 - 0x800, true, RK_HEADER_V1 },
- { "rk322x", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
- { "rk3288", "RK32", 0x8000, false, RK_HEADER_V1 },
- { "rk3308", "RK33", 0x40000 - 0x1000, false, RK_HEADER_V1 },
- { "rk3328", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
- { "rk3368", "RK33", 0x8000 - 0x1000, false, RK_HEADER_V1 },
- { "rk3399", "RK33", 0x30000 - 0x2000, false, RK_HEADER_V1 },
- { "rv1108", "RK11", 0x1800, false, RK_HEADER_V1 },
- { "rk3568", "RK35", 0x14000 - 0x1000, false, RK_HEADER_V2 },
+ { "px30", "RK33", 0x2800, false, RK_HEADER_V1, true},
+ { "rk3036", "RK30", 0x1000, false, RK_HEADER_V1, true },
+ { "rk3066", "RK30", 0x8000 - 0x800, true, RK_HEADER_V1, true },
+ { "rk3128", "RK31", 0x1800, false, RK_HEADER_V1, true },
+ { "rk3188", "RK31", 0x8000 - 0x800, true, RK_HEADER_V1, true },
+ { "rk322x", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1, true },
+ { "rk3288", "RK32", 0x8000, false, RK_HEADER_V1, true },
+ { "rk3308", "RK33", 0x40000 - 0x1000, false, RK_HEADER_V1, true },
+ { "rk3328", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1, false },
+ { "rk3368", "RK33", 0x8000 - 0x1000, false, RK_HEADER_V1, true },
+ { "rk3399", "RK33", 0x30000 - 0x2000, false, RK_HEADER_V1, true },
+ { "rv1108", "RK11", 0x1800, false, RK_HEADER_V1, true },
+ { "rk3568", "RK35", 0x14000 - 0x1000, false, RK_HEADER_V2, true },
};
/**
@@ -282,6 +284,13 @@ bool rkcommon_is_header_v2(struct image_tool_params *params)
return (info->header_ver == RK_HEADER_V2);
}
+bool rkcommon_has_spi_halfblock_quirk(struct image_tool_params *params)
+{
+ struct spl_info *info = rkcommon_get_spl_info(params->imagename);
+
+ return info->has_spi_halfblock_quirk;
+}
+
static void do_sha256_hash(uint8_t *buf, uint32_t size, uint8_t *out)
{
sha256_context ctx;
diff --git a/tools/rkcommon.h b/tools/rkcommon.h
index 49b6df3185..7b0c036dac 100644
--- a/tools/rkcommon.h
+++ b/tools/rkcommon.h
@@ -41,6 +41,15 @@ const char *rkcommon_get_spl_hdr(struct image_tool_params *params);
*/
int rkcommon_get_spl_size(struct image_tool_params *params);
+
+/**
+ * rkcommon_has_spi_halfblock_quirk checks if the SoC MaskROM has the SPI block
+ * loading quirk.
+ * SoCs with this quirk load the initial TPL/SPL incorrectly and need each 4K
+ * block of it to be split into two 2K blocks with the upper half padded.
+ */
+bool rkcommon_has_spi_halfblock_quirk(struct image_tool_params *params);
+
/**
* rkcommon_set_header() - set up the header for a Rockchip boot image
*
diff --git a/tools/rkspi.c b/tools/rkspi.c
index f2530f7bde..b6f75fae1b 100644
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -26,6 +26,9 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
rkcommon_set_header(buf, sbuf, ifd, params);
+ if(!rkcommon_has_spi_halfblock_quirk(params))
+ return;
+
/*
* Spread the image out so we only use the first 2KB of each 4KB
* region. This is a feature of the SPI format required by the Rockchip
@@ -62,6 +65,9 @@ static int rkspi_vrec_header(struct image_tool_params *params,
{
rkcommon_vrec_header(params, tparams);
+ if(!rkcommon_has_spi_halfblock_quirk(params))
+ return 0;
+
/*
* Converting to the SPI format (i.e. splitting each 4K page into two
* 2K subpages and then padding these 2K pages up to take a complete
--
2.37.2
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