[PATCH] arm64: ls104x: Enable eDMA snooping

[Sean Anderson]

This enables eDMA snooping on the LS1043A and LS1046A. This will allow
marking the I2C, LPUART, and SPI devices on these SoCs as DMA coherent.
Oddly, this bit is only documented for the LS1043A, and is marked as
"reserved" in the LS1046ARM. I have tested this patch on the LS1046A
and found that marking i2c0 as dma-coherent works without issue.

Signed-off-by: Sean Anderson <sean.anderson at seco.com>
---

 arch/arm/cpu/armv8/fsl-layerscape/soc.c                | 2 +-
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 926f8f21b63..515dbe02fd7 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -682,7 +682,7 @@ void fsl_lsch2_early_init_f(void)
 			SCFG_SNPCNFGCR_USB1WRSNP | SCFG_SNPCNFGCR_USB2RDSNP |
 			SCFG_SNPCNFGCR_USB2WRSNP | SCFG_SNPCNFGCR_USB3RDSNP |
 			SCFG_SNPCNFGCR_USB3WRSNP | SCFG_SNPCNFGCR_SATARDSNP |
-			SCFG_SNPCNFGCR_SATAWRSNP);
+			SCFG_SNPCNFGCR_SATAWRSNP | SCFG_SNPCNFGCR_EDMASNP);
 #elif defined(CONFIG_ARCH_LS1012A)
 	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
 			SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_USB1RDSNP |
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 06adf669390..e86cfba8669 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -413,6 +413,7 @@ struct ccsr_gur {
 #define SCFG_SNPCNFGCR_SATAWRSNP	0x00400000
 #define SCFG_SNPCNFGCR_USB1RDSNP	0x00200000
 #define SCFG_SNPCNFGCR_USB1WRSNP	0x00100000
+#define SCFG_SNPCNFGCR_EDMASNP		0x00020000
 #define SCFG_SNPCNFGCR_USB2RDSNP	0x00008000
 #define SCFG_SNPCNFGCR_USB2WRSNP	0x00010000
 #define SCFG_SNPCNFGCR_USB3RDSNP	0x00002000
-- 
2.35.1.1320.gc452695387.dirty