[PATCH] configs: rockchip: Drop TPL_MAX_SIZE definition

[Kever Yang]

Hi Michael,

On 2022/9/24 21:36, Michael Trimarchi wrote:
> The max size is defined at architectural level. On the same commit
> I have checked mostly all the other architecture and look like they are

So how is this TPL_MAX_SIZE or SPL_PAD_TO is defined for rockchip platform?

This value should be different for different SoCs.


Thanks,

- Kever

>
> Fixes: commit ca8a329a1b7f ("Convert CONFIG_SPL_PAD_TO et al to Kconfig")
> Signed-off-by: Michael Trimarchi <michael at amarulasolutions.com>
> ---
>   configs/evb-px30_defconfig                    | 1 -
>   configs/evb-px5_defconfig                     | 1 -
>   configs/evb-rk3229_defconfig                  | 1 -
>   configs/evb-rk3328_defconfig                  | 1 -
>   configs/firefly-px30_defconfig                | 1 -
>   configs/lion-rk3368_defconfig                 | 1 -
>   configs/nanopi-r2s-rk3328_defconfig           | 1 -
>   configs/odroid-go2_defconfig                  | 1 -
>   configs/px30-core-ctouch2-of10-px30_defconfig | 1 -
>   configs/px30-core-ctouch2-px30_defconfig      | 1 -
>   configs/px30-core-edimm2.2-px30_defconfig     | 1 -
>   configs/roc-cc-rk3328_defconfig               | 1 -
>   configs/rock-pi-e-rk3328_defconfig            | 1 -
>   configs/rock64-rk3328_defconfig               | 1 -
>   14 files changed, 14 deletions(-)
>
> diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
> index 240a044b2a..4f88879e18 100644
> --- a/configs/evb-px30_defconfig
> +++ b/configs/evb-px30_defconfig
> @@ -17,7 +17,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_DEBUG_UART_BASE=0xFF160000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x20000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
> diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
> index 8112b42c94..40df2892e5 100644
> --- a/configs/evb-px5_defconfig
> +++ b/configs/evb-px5_defconfig
> @@ -19,7 +19,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SPL_SPI_FLASH_SUPPORT=y
>   CONFIG_SPL_SPI=y
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x40000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
> diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
> index c8833e68ec..442f504826 100644
> --- a/configs/evb-rk3229_defconfig
> +++ b/configs/evb-rk3229_defconfig
> @@ -17,7 +17,6 @@ CONFIG_SPL_STACK_R_ADDR=0x60600000
>   CONFIG_DEBUG_UART_BASE=0x11030000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x61800800
> -CONFIG_TPL_MAX_SIZE=0x100000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x61100000
> diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
> index 251cc3f3cf..2782a3901d 100644
> --- a/configs/evb-rk3328_defconfig
> +++ b/configs/evb-rk3328_defconfig
> @@ -16,7 +16,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
>   CONFIG_DEBUG_UART_BASE=0xFF130000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x40000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
> diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig
> index 4bc2031086..1717eb2110 100644
> --- a/configs/firefly-px30_defconfig
> +++ b/configs/firefly-px30_defconfig
> @@ -18,7 +18,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_DEBUG_UART_BASE=0xFF160000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x20000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
> diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
> index 5f7c5a0091..33cd0c37c6 100644
> --- a/configs/lion-rk3368_defconfig
> +++ b/configs/lion-rk3368_defconfig
> @@ -18,7 +18,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SPL_SPI_FLASH_SUPPORT=y
>   CONFIG_SPL_SPI=y
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x40000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
> diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig
> index 4dfb7782d9..86f5e111f8 100644
> --- a/configs/nanopi-r2s-rk3328_defconfig
> +++ b/configs/nanopi-r2s-rk3328_defconfig
> @@ -16,7 +16,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_DEBUG_UART_BASE=0xFF130000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x40000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
> diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig
> index f8e432239b..c0c0c4daee 100644
> --- a/configs/odroid-go2_defconfig
> +++ b/configs/odroid-go2_defconfig
> @@ -20,7 +20,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_DEBUG_UART_BASE=0xFF160000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x20000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
> diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig
> index 625460b34e..2fb8bd8a23 100644
> --- a/configs/px30-core-ctouch2-of10-px30_defconfig
> +++ b/configs/px30-core-ctouch2-of10-px30_defconfig
> @@ -18,7 +18,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_DEBUG_UART_BASE=0xFF160000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x20000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
> diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig
> index bca4698212..76f81ae437 100644
> --- a/configs/px30-core-ctouch2-px30_defconfig
> +++ b/configs/px30-core-ctouch2-px30_defconfig
> @@ -18,7 +18,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_DEBUG_UART_BASE=0xFF160000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x20000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
> diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig
> index c13af9320e..8493500a06 100644
> --- a/configs/px30-core-edimm2.2-px30_defconfig
> +++ b/configs/px30-core-edimm2.2-px30_defconfig
> @@ -18,7 +18,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_DEBUG_UART_BASE=0xFF160000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x20000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
> diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
> index 8e2e5302e4..8ba50345da 100644
> --- a/configs/roc-cc-rk3328_defconfig
> +++ b/configs/roc-cc-rk3328_defconfig
> @@ -16,7 +16,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_DEBUG_UART_BASE=0xFF130000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x40000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
> diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
> index 9831670137..fb5eac3c1f 100644
> --- a/configs/rock-pi-e-rk3328_defconfig
> +++ b/configs/rock-pi-e-rk3328_defconfig
> @@ -17,7 +17,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
>   CONFIG_DEBUG_UART_BASE=0xFF130000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x40000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
> diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
> index 9ca6f3a3a1..b055dd0979 100644
> --- a/configs/rock64-rk3328_defconfig
> +++ b/configs/rock64-rk3328_defconfig
> @@ -16,7 +16,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_DEBUG_UART_BASE=0xFF130000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x40000
>   CONFIG_DEBUG_UART=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000