[PATCH v3 2/3] phy: rockchip-inno-usb2: add initial support for rk3588 PHY

Jonas Karlman jonas at kwiboo.se
Sun Apr 2 13:04:50 CEST 2023


Hi Eugen,

On 2023-03-31 11:40, Eugen Hristev wrote:
> Add initial support for the rk3588 PHY variant.
> The driver now looks for phy-supply and enables/disables the vbus
> accordingly.

Maybe this should be added to core phy uclass to closer match linux?

Look like e.g. meson phy drivers also handle a phy-supply and could also
benefit from having this in phy uclass instead of in each phy driver.

Regards,
Jonas

> The lookup for the host-port reg inside the struct now does a do {} while()
> instead of a while() {} in order to allow a first check for reg == 0.
> 
> Co-developed-by: Frank Wang <frank.wang at rock-chips.com>
> Signed-off-by: Frank Wang <frank.wang at rock-chips.com>
> Signed-off-by: Eugen Hristev <eugen.hristev at collabora.com>
> Tested-by: Vasily Khoruzhick <anarsoul at gmail.com> # rk3568-based board
> Tested-by: Xavier Drudis Ferran <xdrudis at tinet.cat> # rk3399 rock pi 4B+
> ---
> Changes in v3:
>  - add handling of -EBUSY and -EALREADY for regulator return
> Changes in v2:
>  - add handling of -EACCES
> 
>  drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 109 +++++++++++++++++-
>  1 file changed, 104 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index 55e1dbcfef7e..75c50670524e 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -13,6 +13,7 @@
>  #include <dm/device_compat.h>
>  #include <dm/lists.h>
>  #include <generic-phy.h>
> +#include <power/regulator.h>
>  #include <reset.h>
>  #include <syscon.h>
>  #include <asm/gpio.h>
> @@ -61,6 +62,7 @@ struct rockchip_usb2phy_cfg {
>  struct rockchip_usb2phy {
>  	void *reg_base;
>  	struct clk phyclk;
> +	struct udevice *vbus_supply[USB2PHY_NUM_PORTS];
>  	const struct rockchip_usb2phy_cfg *phy_cfg;
>  };
>  
> @@ -86,11 +88,34 @@ struct rockchip_usb2phy_port_cfg *us2phy_get_port(struct phy *phy)
>  	return &phy_cfg->port_cfgs[phy->id];
>  }
>  
> +static struct udevice *rockchip_usb2phy_check_vbus(struct phy *phy)
> +{
> +	struct udevice *parent = phy->dev->parent;
> +	struct rockchip_usb2phy *priv = dev_get_priv(parent);
> +	struct udevice *vbus = NULL;
> +
> +	if (phy->id == USB2PHY_PORT_HOST)
> +		vbus = priv->vbus_supply[USB2PHY_PORT_HOST];
> +
> +	return vbus;
> +}
> +
>  static int rockchip_usb2phy_power_on(struct phy *phy)
>  {
>  	struct udevice *parent = dev_get_parent(phy->dev);
>  	struct rockchip_usb2phy *priv = dev_get_priv(parent);
>  	const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
> +	struct udevice *vbus = NULL;
> +	int ret;
> +
> +	vbus = rockchip_usb2phy_check_vbus(phy);
> +	if (vbus) {
> +		ret = regulator_set_enable(vbus, true);
> +		if (ret && ret != -EALREADY) {
> +			dev_err(phy->dev, "vbus enable failed: %d\n", ret);
> +			return ret;
> +		}
> +	}
>  
>  	property_enable(priv->reg_base, &port_cfg->phy_sus, false);
>  
> @@ -105,6 +130,17 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
>  	struct udevice *parent = dev_get_parent(phy->dev);
>  	struct rockchip_usb2phy *priv = dev_get_priv(parent);
>  	const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
> +	struct udevice *vbus = NULL;
> +	int ret;
> +
> +	vbus = rockchip_usb2phy_check_vbus(phy);
> +	if (vbus) {
> +		ret = regulator_set_enable(vbus, false);
> +		if (ret && ret != -EACCES && ret != -EBUSY) {
> +			dev_info(phy->dev, "vbus disable failed: %d\n", ret);
> +			return ret;
> +		}
> +	}
>  
>  	property_enable(priv->reg_base, &port_cfg->phy_sus, true);
>  
> @@ -149,13 +185,20 @@ static int rockchip_usb2phy_of_xlate(struct phy *phy,
>  				     struct ofnode_phandle_args *args)
>  {
>  	const char *name = phy->dev->name;
> +	struct udevice *parent = phy->dev->parent;
> +	struct rockchip_usb2phy *priv = dev_get_priv(parent);
>  
> -	if (!strcasecmp(name, "host-port"))
> +	if (!strcasecmp(name, "host-port")) {
>  		phy->id = USB2PHY_PORT_HOST;
> -	else if (!strcasecmp(name, "otg-port"))
> +		device_get_supply_regulator(phy->dev, "phy-supply",
> +					    &priv->vbus_supply[USB2PHY_PORT_HOST]);
> +	} else if (!strcasecmp(name, "otg-port")) {
>  		phy->id = USB2PHY_PORT_OTG;
> -	else
> +		device_get_supply_regulator(phy->dev, "phy-supply",
> +					    &priv->vbus_supply[USB2PHY_PORT_OTG]);
> +	} else {
>  		dev_err(phy->dev, "improper %s device\n", name);
> +	}
>  
>  	return 0;
>  }
> @@ -201,14 +244,14 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
>  
>  	/* find out a proper config which can be matched with dt. */
>  	index = 0;
> -	while (phy_cfgs[index].reg) {
> +	do {
>  		if (phy_cfgs[index].reg == reg) {
>  			priv->phy_cfg = &phy_cfgs[index];
>  			break;
>  		}
>  
>  		++index;
> -	}
> +	} while (phy_cfgs[index].reg);
>  
>  	if (!priv->phy_cfg) {
>  		dev_err(dev, "failed find proper phy-cfg\n");
> @@ -348,6 +391,58 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
>  	{ /* sentinel */ }
>  };
>  
> +static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
> +	{
> +		.reg		= 0x0000,
> +		.port_cfgs	= {
> +			[USB2PHY_PORT_OTG] = {
> +				.phy_sus	= { 0x000c, 11, 11, 0, 1 },
> +				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
> +				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
> +				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
> +				.utmi_ls	= { 0x00c0, 10, 9, 0, 1 },
> +			}
> +		},
> +	},
> +	{
> +		.reg		= 0x4000,
> +		.port_cfgs	= {
> +			[USB2PHY_PORT_OTG] = {
> +				.phy_sus	= { 0x000c, 11, 11, 0, 0 },
> +				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
> +				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
> +				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
> +				.utmi_ls	= { 0x00c0, 10, 9, 0, 1 },
> +			}
> +		},
> +	},
> +	{
> +		.reg		= 0x8000,
> +		.port_cfgs	= {
> +			[USB2PHY_PORT_HOST] = {
> +				.phy_sus	= { 0x0008, 2, 2, 0, 1 },
> +				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
> +				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
> +				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
> +				.utmi_ls	= { 0x00c0, 10, 9, 0, 1 },
> +			}
> +		},
> +	},
> +	{
> +		.reg		= 0xc000,
> +		.port_cfgs	= {
> +			[USB2PHY_PORT_HOST] = {
> +				.phy_sus	= { 0x0008, 2, 2, 0, 1 },
> +				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
> +				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
> +				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
> +				.utmi_ls	= { 0x00c0, 10, 9, 0, 1 },
> +			}
> +		},
> +	},
> +	{ /* sentinel */ }
> +};
> +
>  static const struct udevice_id rockchip_usb2phy_ids[] = {
>  	{
>  		.compatible = "rockchip,rk3399-usb2phy",
> @@ -357,6 +452,10 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
>  		.compatible = "rockchip,rk3568-usb2phy",
>  		.data = (ulong)&rk3568_phy_cfgs,
>  	},
> +	{
> +		.compatible = "rockchip,rk3588-usb2phy",
> +		.data = (ulong)&rk3588_phy_cfgs,
> +	},
>  	{ /* sentinel */ }
>  };
>  



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