[PATCH] riscv: Add a 64-bit image type
Simon Glass
sjg at chromium.org
Sun Apr 2 22:28:13 CEST 2023
At present it is not possible to know whether an image can be booted by
a 32- or 64-bit bootloader. This means that U-Boot may attempt to boot
the wrong image. This may cause a crash which might be hard to debug.
Add a new property to make this explicit.
The existing 'RISC-V' is now taken to mean 32-bit.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
boot/image.c | 3 ++-
include/image.h | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/boot/image.c b/boot/image.c
index 958dbf853474..3f75069695f8 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -95,7 +95,8 @@ static const table_entry_t uimage_arch[] = {
{ IH_ARCH_ARC, "arc", "ARC", },
{ IH_ARCH_X86_64, "x86_64", "AMD x86_64", },
{ IH_ARCH_XTENSA, "xtensa", "Xtensa", },
- { IH_ARCH_RISCV, "riscv", "RISC-V", },
+ { IH_ARCH_RISCV, "riscv", "RISC-V 32 Bit",},
+ { IH_ARCH_RISCV64, "riscv64", "RISC-V 64 Bit",},
{ -1, "", "", },
};
diff --git a/include/image.h b/include/image.h
index 7717a4c13d38..a3bdcc6e7f80 100644
--- a/include/image.h
+++ b/include/image.h
@@ -138,7 +138,8 @@ enum {
IH_ARCH_ARC, /* Synopsys DesignWare ARC */
IH_ARCH_X86_64, /* AMD x86_64, Intel and Via */
IH_ARCH_XTENSA, /* Xtensa */
- IH_ARCH_RISCV, /* RISC-V */
+ IH_ARCH_RISCV, /* RISC-V 32-Bit */
+ IH_ARCH_RISCV64, /* RISC-V 64 Bit */
IH_ARCH_COUNT,
};
--
2.40.0.348.gf938b09366-goog
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