[PATCH 5/9] armv7: Use isb/dsb directly in start.S
Tom Rini
trini at konsulko.com
Thu Apr 6 01:48:55 CEST 2023
Toolchains which do not directly support using "isb" and "dsb" directly
are no longer functionally supported in U-Boot. Furthermore, clang has
for a long time warned about using the alternate form that we were.
Update the code.
Signed-off-by: Tom Rini <trini at konsulko.com>
---
arch/arm/cpu/armv7/start.S | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 7d7aac021e22..69e281b086af 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -134,8 +134,8 @@ ENTRY(c_runtime_cpu_setup)
*/
#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
- mcr p15, 0, r0, c7, c10, 4 @ DSB
- mcr p15, 0, r0, c7, c5, 4 @ ISB
+ dsb
+ isb
#endif
bx lr
@@ -188,8 +188,8 @@ ENTRY(cpu_init_cp15)
mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs
mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array
- mcr p15, 0, r0, c7, c10, 4 @ DSB
- mcr p15, 0, r0, c7, c5, 4 @ ISB
+ dsb
+ isb
/*
* disable MMU stuff and caches
--
2.34.1
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