[PATCH v1 10/14] spi: mpc8xxx: Add support for SPI on mpc832x

[Christophe Leroy]

On mpc832x, SPI can be either handled by CPU or QE.
In order to work in CPU mode, bit 17 of SPMODE has to
be set to 1, that bit is called OP.

Also, data is located at a different place than the one expected
by the driver today. In 8 bits mode with REV set, data to be
transmitted is located in the most significant byte while
received data is located in second byte. So perform the
necessary shifts.

In order to differentiate with other CPUs, a new compatible is
added for mpc832x: fsl,mpc832x-spi

Signed-off-by: Christophe Leroy <christophe.leroy at csgroup.eu>
Cc: Rasmus Villemoes <rasmus.villemoes at prevas.dk>
---
 arch/powerpc/include/asm/mpc8xxx_spi.h |  1 +
 drivers/spi/mpc8xxx_spi.c              | 13 +++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/arch/powerpc/include/asm/mpc8xxx_spi.h b/arch/powerpc/include/asm/mpc8xxx_spi.h
index 83cfe23b4e..8e9411aefb 100644
--- a/arch/powerpc/include/asm/mpc8xxx_spi.h
+++ b/arch/powerpc/include/asm/mpc8xxx_spi.h
@@ -12,6 +12,7 @@
 
 #if defined(CONFIG_ARCH_MPC8308) || \
 	defined(CONFIG_ARCH_MPC8313) || \
+	defined(CONFIG_ARCH_MPC832X) || \
 	defined(CONFIG_ARCH_MPC834X) || \
 	defined(CONFIG_ARCH_MPC837X)
 
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 6869d60d97..78892173dc 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -16,6 +16,7 @@
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
+#include <asm/arch/soc.h>
 
 enum {
 	SPI_EV_NE = BIT(31 - 22),	/* Receiver Not Empty */
@@ -30,6 +31,7 @@ enum {
 	SPI_MODE_REV   = BIT(31 - 5),	/* Reverse mode - MSB first */
 	SPI_MODE_MS    = BIT(31 - 6),	/* Always master */
 	SPI_MODE_EN    = BIT(31 - 7),	/* Enable interface */
+	SPI_MODE_OP    = BIT(31 - 17),	/* CPU Mode, QE otherwise */
 
 	SPI_MODE_LEN_MASK = 0xf00000,
 	SPI_MODE_LEN_SHIFT = 20,
@@ -89,6 +91,9 @@ static int mpc8xxx_spi_probe(struct udevice *dev)
 	 */
 	out_be32(&priv->spi->mode, SPI_MODE_REV | SPI_MODE_MS);
 
+	if (dev_get_driver_data(dev) == SOC_MPC832X)
+		setbits_be32(&priv->spi->mode, SPI_MODE_OP);
+
 	/* set len to 8 bits */
 	setbits_be32(&spi->mode, (8 - 1) << SPI_MODE_LEN_SHIFT);
 
@@ -130,6 +135,7 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen,
 	u32 tmpdin = 0, tmpdout = 0, n;
 	const u8 *cout = dout;
 	u8 *cin = din;
+	ulong type = dev_get_driver_data(bus);
 
 	debug("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__,
 	      bus->name, plat->cs, (uint)dout, (uint)din, bitlen);
@@ -157,6 +163,9 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen,
 		if (cout)
 			tmpdout = *cout++;
 
+		if (type == SOC_MPC832X)
+			tmpdout <<= 24;
+
 		/* Write the data out */
 		out_be32(&spi->tx, tmpdout);
 
@@ -179,6 +188,9 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen,
 			tmpdin = in_be32(&spi->rx);
 			setbits_be32(&spi->event, SPI_EV_NE);
 
+			if (type == SOC_MPC832X)
+				tmpdin >>= 16;
+
 			if (cin)
 				*cin++ = tmpdin;
 
@@ -271,6 +283,7 @@ static const struct dm_spi_ops mpc8xxx_spi_ops = {
 
 static const struct udevice_id mpc8xxx_spi_ids[] = {
 	{ .compatible = "fsl,spi" },
+	{ .compatible = "fsl,mpc832x-spi", .data = SOC_MPC832X },
 	{ }
 };
 
-- 
2.39.2