[PATCH 15/18] arm: dts: fsl-ls1088a: move and sync existing bindings to be under /soc
Mathew McBride
matt at traverse.com.au
Wed Apr 12 09:38:27 CEST 2023
Our [U-Boot] copy of fsl-ls1088a.dtsi had all the hardware under
the top level, until the DM_SERIAL implementation recently.
In this commit, remove any remaining devices (that were in U-Boot,
but not touched by previous patches in this series) to be under /soc,
updating to their upstream (Linux) bindings.
The bindings have been copied closest to their relative positions
in the Linux version, so the eventual result is that the U-Boot
and Linux fsl-ls1088a.dtsi will be identical.
The next commit will add the hardware bindings that were not
in U-Boot.
Signed-off-by: Mathew McBride <matt at traverse.com.au>
---
arch/arm/dts/fsl-ls1088a.dtsi | 185 +++++++++++++++++++---------------
1 file changed, 104 insertions(+), 81 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 8321b73f30..d5822520fb 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -159,6 +159,20 @@
status = "disabled";
};
+ dspi: spi at 2100000 {
+ compatible = "fsl,ls1088a-dspi",
+ "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2100000 0x0 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "dspi";
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ spi-num-chipselects = <6>;
+ status = "disabled";
+ };
+
duart1: serial at 21c0600 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0600 0x0 0x100>;
@@ -212,6 +226,16 @@
#interrupt-cells = <2>;
};
+ ifc: memory-controller at 2240000 {
+ compatible = "fsl,ifc";
+ reg = <0x0 0x2240000 0x0 0x20000>;
+ interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
+ little-endian;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ status = "disabled";
+ };
+
i2c0: i2c at 2000000 {
compatible = "fsl,vf610-i2c";
#address-cells = <1>;
@@ -256,6 +280,35 @@
status = "disabled";
};
+ qspi: spi at 20c0000 {
+ compatible = "fsl,ls2080a-qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x20c0000 0x0 0x10000>,
+ <0x0 0x20000000 0x0 0x10000000>;
+ reg-names = "QuadSPI", "QuadSPI-memory";
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "qspi_en", "qspi";
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ status = "disabled";
+ };
+
+ esdhc: esdhc at 2140000 {
+ compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
+ reg = <0x0 0x2140000 0x0 0x10000>;
+ interrupts = <0 28 0x4>; /* Level high type */
+ clock-frequency = <0>;
+ clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
+ voltage-ranges = <1800 1800 3300 3300>;
+ sdhci,auto-cmd12;
+ little-endian;
+ bus-width = <4>;
+ status = "disabled";
+ };
+
usb0: usb at 3100000 {
compatible = "snps,dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
@@ -278,6 +331,57 @@
status = "disabled";
};
+ sata: sata at 3200000 {
+ compatible = "fsl,ls1088a-ahci";
+ reg = <0x0 0x3200000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
+ interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ dma-coherent;
+ status = "disabled";
+ };
+
+ crypto: crypto at 8000000 {
+ compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
+ fsl,sec-era = <8>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x00 0x8000000 0x100000>;
+ reg = <0x00 0x8000000 0x0 0x100000>;
+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
+
+ sec_jr0: jr at 10000 {
+ compatible = "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x10000 0x10000>;
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr1: jr at 20000 {
+ compatible = "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x20000 0x10000>;
+ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr2: jr at 30000 {
+ compatible = "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x30000 0x10000>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr3: jr at 40000 {
+ compatible = "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x40000 0x10000>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
pcie1: pcie at 3400000 {
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
@@ -652,87 +756,6 @@
};
};
- dspi: dspi at 2100000 {
- compatible = "fsl,vf610-dspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2100000 0x0 0x10000>;
- interrupts = <0 26 0x4>; /* Level high type */
- spi-num-chipselects = <6>;
- };
-
- qspi: quadspi at 1550000 {
- compatible = "fsl,ls1088a-qspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x20c0000 0x0 0x10000>,
- <0x0 0x20000000 0x0 0x10000000>;
- reg-names = "QuadSPI", "QuadSPI-memory";
- status = "disabled";
- };
-
- esdhc: esdhc at 2140000 {
- compatible = "fsl,esdhc";
- reg = <0x0 0x2140000 0x0 0x10000>;
- interrupts = <0 28 0x4>; /* Level high type */
- little-endian;
- bus-width = <4>;
- };
-
- ifc: ifc at 1530000 {
- compatible = "fsl,ifc", "simple-bus";
- reg = <0x0 0x2240000 0x0 0x20000>;
- interrupts = <0 21 0x4>; /* Level high type */
- };
-
- crypto: crypto at 8000000 {
- compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
- fsl,sec-era = <8>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x00 0x8000000 0x100000>;
- reg = <0x00 0x8000000 0x0 0x100000>;
- interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
- dma-coherent;
-
- sec_jr0: jr at 10000 {
- compatible = "fsl,sec-v5.0-job-ring",
- "fsl,sec-v4.0-job-ring";
- reg = <0x10000 0x10000>;
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- sec_jr1: jr at 20000 {
- compatible = "fsl,sec-v5.0-job-ring",
- "fsl,sec-v4.0-job-ring";
- reg = <0x20000 0x10000>;
- interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- sec_jr2: jr at 30000 {
- compatible = "fsl,sec-v5.0-job-ring",
- "fsl,sec-v4.0-job-ring";
- reg = <0x30000 0x10000>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- sec_jr3: jr at 40000 {
- compatible = "fsl,sec-v5.0-job-ring",
- "fsl,sec-v4.0-job-ring";
- reg = <0x40000 0x10000>;
- interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- sata: sata at 3200000 {
- compatible = "fsl,ls1088a-ahci";
- reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
- 0x7 0x100520 0x0 0x4>; /* ecc sata addr*/
- reg-names = "ahci", "sata-ecc";
- interrupts = <0 133 4>;
- status = "disabled";
- };
-
psci {
compatible = "arm,psci-0.2";
method = "smc";
--
2.30.1
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