[PATCH V2 3/3] spi: cadence-quadspi: Reset CMD_CTRL Reg on cmd r/w completion

[Dhruva Gole]

If one leaves the CQSPI_REG_CMDCTRL in an unclean state this may cause
issues in future command reads. This issue came to light when some flash
reads in STIG mode were coming back dirty.

Co-developed-by: Apurva Nandan <a-nandan at ti.com>
Signed-off-by: Apurva Nandan <a-nandan at ti.com>
Signed-off-by: Dhruva Gole <d-gole at ti.com>
---
 drivers/spi/cadence_qspi_apb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 4c055a05807e..9ce2c0f254f3 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -376,6 +376,9 @@ int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg)
 	if (!cadence_qspi_wait_idle(reg_base))
 		return -EIO;
 
+	/* Flush the CMDCTRL reg after the execution */
+	writel(0, reg_base + CQSPI_REG_CMDCTRL);
+
 	return 0;
 }
 
-- 
2.25.1