[PATCH] ram: rk3399: add missing high row detection

[Kever Yang]

On 2023/3/23 18:35, Jonathan Liu wrote:
> For 2 GB LPDDR4 single-rank RAM with 16 rows, the Rockchip ddr init bin
> prints:
> "Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB"
>
> U-Boot TPL prints:
> "BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB"
>
> Add missing high row detection so that U-Boot TPL prints Row=16, same as
> the Rockchip ddr init bin:
> "BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB"
>
> Signed-off-by: Jonathan Liu <net147 at gmail.com>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   drivers/ram/rockchip/sdram_rk3399.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
> index b1fea04e84..b597448203 100644
> --- a/drivers/ram/rockchip/sdram_rk3399.c
> +++ b/drivers/ram/rockchip/sdram_rk3399.c
> @@ -2749,6 +2749,8 @@ static u64 dram_detect_cap(struct dram_info *dram,
>   	/* detect cs1 row */
>   	sdram_detect_cs1_row(cap_info, params->base.dramtype);
>   
> +	sdram_detect_high_row(cap_info);
> +
>   	/* detect die bw */
>   	sdram_detect_dbw(cap_info, params->base.dramtype);
>