[PATCH v2 18/18] x86: samus: Adjust TPL start and pre-reloc memory size
Simon Glass
sjg at chromium.org
Tue Apr 18 17:31:01 CEST 2023
Move the TPL up a little to make room for the refcode binary blob. Also
increase the pre-relocation memory to make space for recent additions.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
Changes in v2:
- Drop patch "x86: Add on to existing MTRRs in SPL"
- Add various patches to resolve problems with chromebook_link64
configs/chromebook_samus_tpl_defconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
index 337768b45fd0..4cfaf4bc5c79 100644
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@ -1,6 +1,6 @@
CONFIG_X86=y
CONFIG_TEXT_BASE=0xffed0000
-CONFIG_SYS_MALLOC_F_LEN=0x1a00
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x3F8000
@@ -8,7 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
CONFIG_SPL_TEXT_BASE=0xffe70000
-CONFIG_TPL_TEXT_BASE=0xfffd8000
+CONFIG_TPL_TEXT_BASE=0xfffd8100
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_BOARD_INIT=y
--
2.40.0.634.g4ca3ef3211-goog
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