[PATCH v2 06/17] mmc: rockchip_sdhci: Use set_clock and config_dll sdhci_ops

[Jonas Karlman]

Hi Kever,
On 2023-04-20 13:10, Jonas Karlman wrote:
> Hi Kever,
> On 2023-04-20 12:19, Kever Yang wrote:
>> Hi Tom,
>>
>> I got error report like below log when apply many of this patchset with 
>> "git-pw patch apply 1770392",
>>
>> did you met this kind of issue and do you know why?
> 
> There are some interdependence in different incoming rockchip series,
> I have seen similar issue due to conflicts applying rk patches locally.

Look like this patch was conflicting with [1]. This patch also include a
change how the mmc->clock is used. I have not been able to reproduce the
issue described in [1] with this series.

Will send a rebased v3 of just this patch, remaining patches in this
series apply cleanly on top of your master branch after the conflict in
this patch is resolved.

[1] https://patchwork.ozlabs.org/project/uboot/patch/20230307212646.56576-1-anarsoul@gmail.com/

Regards,
Jonas

> 
> Regards,
> Jonas
> 
>>
>> error: sha1 information is lacking or useless 
>> (drivers/mmc/rockchip_sdhci.c).
>> error: could not build fake ancestor
>> hint: Use 'git am --show-current-patch' to see the failed patch
>> Patch failed at 0006 mmc: rockchip_sdhci: Use set_clock and config_dll 
>> sdhci_ops
>>
>> Thanks,
>>
>> - Kever
>>
>> On 2023/4/19 00:46, Jonas Karlman wrote:
>>> Change to configure clock and DLL in set_clock and config_dll ops
>>> instead of in the set_ios_post ops.
>>>
>>> With this change the output clock is turned off while configuring DLL
>>> parameters, according to the design recommendations.
>>>
>>> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
>>> ---
>>> v2:
>>> - No change
>>>
>>>   drivers/mmc/rockchip_sdhci.c | 28 +++++++++++++++-------------
>>>   1 file changed, 15 insertions(+), 13 deletions(-)
>>>
>>> diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
>>> index bc9838ac7c45..fdf48f4066c9 100644
>>> --- a/drivers/mmc/rockchip_sdhci.c
>>> +++ b/drivers/mmc/rockchip_sdhci.c
>>> @@ -291,18 +291,24 @@ static int rk3399_sdhci_set_ios_post(struct sdhci_host *host)
>>>   	return 0;
>>>   }
>>>   
>>> -static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock)
>>> +static void rk3568_sdhci_set_clock(struct sdhci_host *host, u32 div)
>>>   {
>>>   	struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host);
>>> +	struct mmc *mmc = host->mmc;
>>> +	ulong rate;
>>> +
>>> +	rate = clk_set_rate(&priv->emmc_clk, mmc->clock);
>>> +	if (IS_ERR_VALUE(rate))
>>> +		printf("%s: Set clock rate failed: %ld\n", __func__, (long)rate);
>>> +}
>>> +
>>> +static int rk3568_sdhci_config_dll(struct sdhci_host *host, u32 clock, bool enable)
>>> +{
>>>   	int val, ret;
>>>   	u32 extra;
>>>   
>>> -	if (clock > host->max_clk)
>>> -		clock = host->max_clk;
>>> -	if (clock)
>>> -		clk_set_rate(&priv->emmc_clk, clock);
>>> -
>>> -	sdhci_set_clock(host->mmc, clock);
>>> +	if (!enable)
>>> +		return 0;
>>>   
>>>   	if (clock >= 100 * MHz) {
>>>   		/* reset DLL */
>>> @@ -386,14 +392,8 @@ static int rk3568_sdhci_set_enhanced_strobe(struct sdhci_host *host)
>>>   static int rk3568_sdhci_set_ios_post(struct sdhci_host *host)
>>>   {
>>>   	struct mmc *mmc = host->mmc;
>>> -	uint clock = mmc->tran_speed;
>>>   	u32 reg, vendor_reg;
>>>   
>>> -	if (!clock)
>>> -		clock = mmc->clock;
>>> -
>>> -	rk3568_sdhci_emmc_set_clock(host, clock);
>>> -
>>>   	if (mmc->selected_mode == MMC_HS_400 || mmc->selected_mode == MMC_HS_400_ES) {
>>>   		reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
>>>   		reg &= ~SDHCI_CTRL_UHS_MASK;
>>> @@ -614,6 +614,8 @@ static const struct sdhci_data rk3399_data = {
>>>   static const struct sdhci_data rk3568_data = {
>>>   	.get_phy = rk3568_emmc_get_phy,
>>>   	.set_ios_post = rk3568_sdhci_set_ios_post,
>>> +	.set_clock = rk3568_sdhci_set_clock,
>>> +	.config_dll = rk3568_sdhci_config_dll,
>>>   	.set_enhanced_strobe = rk3568_sdhci_set_enhanced_strobe,
>>>   };
>>>   
>