[PATCH 1/8] pci: pcie_dw_rockchip: Get config region from reg prop

[Jonas Karlman]

Get the config region to use from the reg prop. Also check the return
value from dev_read_addr_index correctly. And update the referenced
region index used in comment.

Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
---
 drivers/pci/pcie_dw_common.c   | 10 ++++++----
 drivers/pci/pcie_dw_rockchip.c | 15 +++++++++++----
 2 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/pcie_dw_common.c b/drivers/pci/pcie_dw_common.c
index 9f8b016d1149..74fb6df412c7 100644
--- a/drivers/pci/pcie_dw_common.c
+++ b/drivers/pci/pcie_dw_common.c
@@ -141,9 +141,9 @@ static uintptr_t set_cfg_address(struct pcie_dw *pcie,
 
 	/*
 	 * Not accessing root port configuration space?
-	 * Region #0 is used for Outbound CFG space access.
+	 * Region #1 is used for Outbound CFG space access.
 	 * Direction = Outbound
-	 * Region Index = 0
+	 * Region Index = 1
 	 */
 	d = PCI_MASK_BUS(d);
 	d = PCI_ADD_BUS(bus, d);
@@ -328,8 +328,10 @@ void pcie_dw_setup_host(struct pcie_dw *pci)
 			pci->prefetch.bus_start = hose->regions[ret].bus_start;  /* PREFETCH_bus_addr */
 			pci->prefetch.size = hose->regions[ret].size;	    /* PREFETCH size */
 		} else if (hose->regions[ret].flags == PCI_REGION_SYS_MEMORY) {
-			pci->cfg_base = (void *)(pci->io.phys_start - pci->io.size);
-			pci->cfg_size = pci->io.size;
+			if (!pci->cfg_base) {
+				pci->cfg_base = (void *)(pci->io.phys_start - pci->io.size);
+				pci->cfg_size = pci->io.size;
+			}
 		} else {
 			dev_err(pci->dev, "invalid flags type!\n");
 		}
diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 60c74bea24b2..225af400ba70 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -355,17 +355,24 @@ static int rockchip_pcie_parse_dt(struct udevice *dev)
 	int ret;
 
 	priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0);
-	if (!priv->dw.dbi_base)
-		return -ENODEV;
+	if ((fdt_addr_t)priv->dw.dbi_base == FDT_ADDR_T_NONE)
+		return -EINVAL;
 
 	dev_dbg(dev, "DBI address is 0x%p\n", priv->dw.dbi_base);
 
 	priv->apb_base = (void *)dev_read_addr_index(dev, 1);
-	if (!priv->apb_base)
-		return -ENODEV;
+	if ((fdt_addr_t)priv->apb_base == FDT_ADDR_T_NONE)
+		return -EINVAL;
 
 	dev_dbg(dev, "APB address is 0x%p\n", priv->apb_base);
 
+	priv->dw.cfg_base =
+		(void *)dev_read_addr_size_index(dev, 2, &priv->dw.cfg_size);
+	if ((fdt_addr_t)priv->dw.cfg_base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	dev_dbg(dev, "CFG address is 0x%p\n", priv->dw.cfg_base);
+
 	ret = gpio_request_by_name(dev, "reset-gpios", 0,
 				   &priv->rst_gpio, GPIOD_IS_OUT);
 	if (ret) {
-- 
2.40.0