[PATCH v2 10/18] pci: Check region ranges are addressable

Stefan Agner stefan at agner.ch
Mon Apr 24 16:06:37 CEST 2023


Hi Andrew,

On 2022-03-29 18:58, Andrew Scull wrote:
> When parsing the `ranges` DT node, check that both extremes of the
> regions are addressable without overflow. This assumption can then be
> safely made when processing the regions.

I've bisected this patch to break USB support on 32-bit Raspberry Pi 4
builds.

We've been using U-Boot v2022.01 so far with USB boot support. With the
migration to U-Boot v2023.01, stopped booting with the following output:

U-Boot 2023.01+ (Apr 24 2023 - 15:11:45 +0200)

DRAM:  948 MiB (effective 7.9 GiB)
RPI 4 Model B (0xd03114)
Core:  207 devices, 15 uclasses, devicetree: board
MMC:   mmcnr at 7e300000: 1, mmc at 7e340000: 0
Loading Environment from nowhere... OK
In:    serial
Out:   serial
Err:   serial
Net:   eth0: ethernet at 7d580000
PCIe BRCM: link up, 5.0 Gbps x1 (SSC)
PCI Autoconfig: Found P2P bridge, device 0
PCI Autoconfig: BAR 0, Prf64, size=0x1000, No resource
PCI: Failed autoconfig bar 10

starting USB...
Bus xhci_pci: 
<freeze>

In this builds I've set #define DEBUG in
drivers/pci/pci_auto(_common).c.

Reverting this commit leads to:

U-Boot 2023.01+ (Apr 24 2023 - 15:47:58 +0200)

DRAM:  948 MiB (effective 7.9 GiB)
RPI 4 Model B (0xd03114)
Core:  207 devices, 15 uclasses, devicetree: board
MMC:   mmcnr at 7e300000: 1, mmc at 7e340000: 0
Loading Environment from nowhere... OK
In:    serial
Out:   serial
Err:   serial
Net:   eth0: ethernet at 7d580000
PCIe BRCM: link up, 5.0 Gbps x1 (SSC)
PCI Autoconfig: Bus Memory region: [c0000000-ffffffff],
                Physical Memory [600000000-63fffffff]
PCI Autoconfig: Found P2P bridge, device 0
PCI Autoconfig: BAR 0, Mem64, size=0x1000, address=0xc0000000
bus_lower=0xc0001000

starting USB...
Bus xhci_pci: Register 5000420 NbrPorts 5
Starting the controller
USB XHCI 1.00
scanning bus xhci_pci for devices... 3 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
...


The system boot successfully a bootable system.

Note that this needs CONFIG_USB_XHCI_BRCM=y which is not set by default
in rpi_4_32b_defconfig.

I am guessing that the freeze is just a subsequent issue of not handling
PCI: Failed autoconfig bar 10 properly. But in any case, I'd prefer to
have a working PCIe in general.

Is maybe the Raspberry Pi device tree not suited for 32-bit operation?
Can't we use some sensible range in this case?

--
Stefan


> 
> Signed-off-by: Andrew Scull <ascull at google.com>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
> ---
>  drivers/pci/pci-uclass.c | 17 ++++++++++++++++-
>  1 file changed, 16 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> index 719656eb3a..d84d97d676 100644
> --- a/drivers/pci/pci-uclass.c
> +++ b/drivers/pci/pci-uclass.c
> @@ -1017,7 +1017,22 @@ static void decode_regions(struct
> pci_controller *hose, ofnode parent_node,
>  
>  		if (!IS_ENABLED(CONFIG_SYS_PCI_64BIT) &&
>  		    type == PCI_REGION_MEM && upper_32_bits(pci_addr)) {
> -			debug(" - beyond the 32-bit boundary, ignoring\n");
> +			debug(" - pci_addr beyond the 32-bit boundary, ignoring\n");
> +			continue;
> +		}
> +
> +		if (!IS_ENABLED(CONFIG_PHYS_64BIT) && upper_32_bits(addr)) {
> +			debug(" - addr beyond the 32-bit boundary, ignoring\n");
> +			continue;
> +		}
> +
> +		if (~((pci_addr_t)0) - pci_addr < size) {
> +			debug(" - PCI range exceeds max address, ignoring\n");
> +			continue;
> +		}
> +
> +		if (~((phys_addr_t)0) - addr < size) {
> +			debug(" - phys range exceeds max address, ignoring\n");
>  			continue;
>  		}


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