[PATCH v3] board: rockchip: Add Radxa E25 Carrier Board

Jonas Karlman jonas at kwiboo.se
Tue Aug 1 10:41:11 CEST 2023


Hi,

On 2023-07-31 11:27, FUKAUMI Naoki wrote:
> hi,
> 
> one thing in defconfig,
> 
> On 7/30/23 21:30, Jonas Karlman wrote:
>> Radxa E25 is a network application carrier board for the Radxa CM3I SoM
>> with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key,
>> USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header.
>>
>> Features tested on a Radxa E25 v1.4:
>> - SD-card boot
>> - eMMC boot
>> - USB host
>> - PCIe/Ethernet adapters is detected
>> - SATA
>>
>> Device tree is imported from linux next-20230728.
>>
>> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
>> Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
>> ---
>> Changes in v3:
>> - Rebased on master and "board: rockchip: Add Pine64 Quartz64 and
>>    SOQuartz boards" v2 series
>> - Sync device tree from linux next-20230728 to include sata1, combphy1
>>    and regulator fixes merged into linux maintainer tree since v2
>> - Drop u-boot.dtsi pcie pinctrl change that caused pinmux issue in linux
>>    when using EFI boot flow
>> - Collect r-b tag
>>
>> Changes in v2:
>> - Remove the unneeded always-on/boot-on prop of vcc3v3_pi6c_05
>> - Drop PCI_INIT_R=y and add MMC_HS200_SUPPORT=y to speed up boot
>> - Enable sata1 node and set correct regulator to combphy1 node,
>>    can be dropped in a future DT sync once linux patch [1] lands
>>
>> This patch depends on the series "board: rockchip: Add Pine64 Quartz64
>> and SOQuartz boards" v2 [2] and all its depends.
>>
>> A copy of this patch and all its depends can be found at [3].
>>
>> [1] https://lore.kernel.org/linux-rockchip/20230724145213.3833099-1-jonas@kwiboo.se/
>> [2] https://patchwork.ozlabs.org/project/uboot/list/?series=366399
>> [3] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3568-radxa-e25-v3
>>
>>   arch/arm/dts/Makefile                     |   1 +
>>   arch/arm/dts/rk3568-radxa-cm3i.dtsi       | 415 ++++++++++++++++++++++
>>   arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi |  32 ++
>>   arch/arm/dts/rk3568-radxa-e25.dts         | 236 ++++++++++++
>>   board/rockchip/evb_rk3568/MAINTAINERS     |   8 +
>>   configs/radxa-e25-rk3568_defconfig        |  94 +++++
>>   doc/board/rockchip/rockchip.rst           |   1 +
>>   7 files changed, 787 insertions(+)
>>   create mode 100644 arch/arm/dts/rk3568-radxa-cm3i.dtsi
>>   create mode 100644 arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
>>   create mode 100644 arch/arm/dts/rk3568-radxa-e25.dts
>>   create mode 100644 configs/radxa-e25-rk3568_defconfig
>>

[...]

>> diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig
>> new file mode 100644
>> index 000000000000..a905100a794d
>> --- /dev/null
>> +++ b/configs/radxa-e25-rk3568_defconfig
>> @@ -0,0 +1,94 @@
>> +CONFIG_ARM=y
>> +CONFIG_SKIP_LOWLEVEL_INIT=y
>> +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
>> +CONFIG_COUNTER_FREQUENCY=24000000
>> +CONFIG_ARCH_ROCKCHIP=y
>> +CONFIG_TEXT_BASE=0x00a00000
>> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
>> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
>> +CONFIG_NR_DRAM_BANKS=2
>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
>> +CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25"
>> +CONFIG_ROCKCHIP_RK3568=y
>> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
>> +CONFIG_SPL_SERIAL=y
>> +CONFIG_SPL_STACK_R_ADDR=0x600000
>> +CONFIG_SPL_STACK=0x400000
>> +CONFIG_DEBUG_UART_BASE=0xFE660000
>> +CONFIG_DEBUG_UART_CLOCK=24000000
>> +CONFIG_SYS_LOAD_ADDR=0xc00800
>> +CONFIG_PCI=y
>> +CONFIG_DEBUG_UART=y
>> +CONFIG_AHCI=y
>> +CONFIG_FIT=y
>> +CONFIG_FIT_VERBOSE=y
>> +CONFIG_SPL_FIT_SIGNATURE=y
>> +CONFIG_SPL_LOAD_FIT=y
>> +CONFIG_LEGACY_IMAGE_FORMAT=y
>> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-radxa-e25.dtb"
>> +# CONFIG_DISPLAY_CPUINFO is not set
>> +CONFIG_DISPLAY_BOARDINFO_LATE=y
>> +CONFIG_SPL_MAX_SIZE=0x40000
>> +CONFIG_SPL_PAD_TO=0x7f8000
>> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>> +CONFIG_SPL_BSS_START_ADDR=0x4000000
>> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
>> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
>> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>> +CONFIG_SPL_STACK_R=y
>> +CONFIG_SPL_ATF=y
>> +CONFIG_CMD_GPIO=y
>> +CONFIG_CMD_GPT=y
>> +CONFIG_CMD_I2C=y
>> +CONFIG_CMD_MMC=y
>> +CONFIG_CMD_PCI=y
>> +CONFIG_CMD_USB=y
>> +# CONFIG_CMD_SETEXPR is not set
>> +CONFIG_CMD_PMIC=y
>> +CONFIG_CMD_REGULATOR=y
>> +# CONFIG_SPL_DOS_PARTITION is not set
>> +CONFIG_SPL_OF_CONTROL=y
>> +CONFIG_OF_LIVE=y
>> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>> +CONFIG_SPL_REGMAP=y
>> +CONFIG_SPL_SYSCON=y
>> +CONFIG_AHCI_PCI=y
> 
> AHCI_PCI is not required for SATA on Carrier Board.

Thanks for testing and reporting this. And you are correct, we do not
need to enable AHCI_PCI to support a SATA drive in the M.2 slot.

I am currently working on a follow-up series to add the missing driver
support for PCIe bifurcation. Will include a small change to drop this
Kconfig option in that series.

Regards,
Jonas

> 
> Tested-by: FUKAUMI Naoki <naoki at radxa.com>
> 
>   => scsi scan
>   scanning bus for devices...
>   Target spinup took 0 ms.
>   AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
>   flags: ncq stag pm led clo only pmp fbss pio slum part ccc apst
>     Device 0: (0:0) Vendor: ATA Prod.: TS120GMTS420S Rev: V011
>               Type: Hard Disk
>               Capacity: 114473.4 MB = 111.7 GB (234441648 x 512)
> 
> Best regards,
> 
>> +CONFIG_DWC_AHCI=y
>> +CONFIG_SPL_CLK=y
>> +CONFIG_ROCKCHIP_GPIO=y
>> +CONFIG_SYS_I2C_ROCKCHIP=y
>> +CONFIG_MISC=y
>> +CONFIG_SUPPORT_EMMC_RPMB=y
>> +CONFIG_MMC_HS200_SUPPORT=y
>> +CONFIG_SPL_MMC_HS200_SUPPORT=y
>> +CONFIG_MMC_DW=y
>> +CONFIG_MMC_DW_ROCKCHIP=y
>> +CONFIG_MMC_SDHCI=y
>> +CONFIG_MMC_SDHCI_SDMA=y
>> +CONFIG_MMC_SDHCI_ROCKCHIP=y
>> +CONFIG_RTL8169=y
>> +CONFIG_PCIE_DW_ROCKCHIP=y
>> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>> +CONFIG_SPL_PINCTRL=y
>> +CONFIG_DM_PMIC=y
>> +CONFIG_PMIC_RK8XX=y
>> +CONFIG_REGULATOR_RK8XX=y
>> +CONFIG_PWM_ROCKCHIP=y
>> +CONFIG_SPL_RAM=y
>> +CONFIG_SCSI=y
>> +CONFIG_DM_SCSI=y
>> +CONFIG_DEBUG_UART_SHIFT=2
>> +CONFIG_SYS_NS16550_MEM32=y
>> +CONFIG_SYSRESET=y
>> +CONFIG_USB=y
>> +CONFIG_USB_XHCI_HCD=y
>> +CONFIG_USB_EHCI_HCD=y
>> +CONFIG_USB_EHCI_GENERIC=y
>> +CONFIG_USB_OHCI_HCD=y
>> +CONFIG_USB_OHCI_GENERIC=y
>> +CONFIG_USB_DWC3=y
>> +CONFIG_USB_DWC3_GENERIC=y
>> +CONFIG_ERRNO_STR=y
>> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
>> index e23237e453f3..10fffb56f13d 100644
>> --- a/doc/board/rockchip/rockchip.rst
>> +++ b/doc/board/rockchip/rockchip.rst
>> @@ -101,6 +101,7 @@ List of mainline supported Rockchip boards:
>>        - Pine64 SOQuartz on Blade (soquartz-blade-rk3566_defconfig)
>>        - Pine64 SOQuartz on CM4-IO (soquartz-cm4-rk3566_defconfig)
>>        - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566_defconfig)
>> +     - Radxa E25 Carrier Board (radxa-e25-rk3568_defconfig)
>>   
>>   * rk3588
>>        - Rockchip EVB (evb-rk3588)



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