[PATCH] CI: x86: coreboot: Update to latest coreboot
Simon Glass
sjg at chromium.org
Fri Aug 11 20:17:43 CEST 2023
Use a recent coreboot build for this test.
The coreboot commit is:
6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings
This is build with default settings, i.e. QEMU x86 i440fx/piix4
Add some documentation as to how to update it next time.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
.azure-pipelines.yml | 2 +-
.gitlab-ci.yml | 2 +-
doc/board/coreboot/coreboot.rst | 20 ++++++++++++++++++++
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 31850ae5718..53a83eef7db 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -426,7 +426,7 @@ stages:
cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/;
fi
if [[ "${TEST_PY_BD}" == "coreboot" ]]; then
- wget -O - "https://drive.google.com/uc?id=1x6nrtWIyIRPLS2cQBwYTnT2TbOI8UjmM&export=download" |xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom;
+ wget -O - "https://drive.google.com/uc?id=1uJ2VkUQ8czWFZmhJQ90Tp8V_zrJ6BrBH&export=download" |xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom;
wget -O - "https://drive.google.com/uc?id=149Cz-5SZXHNKpi9xg6R_5XITWohu348y&export=download" >cbfstool;
chmod a+x cbfstool;
./cbfstool ${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom add-flat-binary -f ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.bin -n fallback/payload -c LZMA -l 0x1110000 -e 0x1110000;
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 8010afae951..1df13261c2d 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -69,7 +69,7 @@ stages:
fi
- if [[ "${TEST_PY_BD}" == "coreboot" ]]; then
wget -O -
- "https://drive.google.com/uc?id=1x6nrtWIyIRPLS2cQBwYTnT2TbOI8UjmM&export=download" |
+ "https://drive.google.com/uc?id=1uJ2VkUQ8czWFZmhJQ90Tp8V_zrJ6BrBH&export=download" |
xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom;
wget -O -
"https://drive.google.com/uc?id=149Cz-5SZXHNKpi9xg6R_5XITWohu348y&export=download" >
diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
index 0fe95af56d2..28157bcb549 100644
--- a/doc/board/coreboot/coreboot.rst
+++ b/doc/board/coreboot/coreboot.rst
@@ -100,3 +100,23 @@ input clock is 1843200. So you can add the following CONFIG options::
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
+
+coreboot in CI
+--------------
+
+CI runs tests using a pre-built coreboot image. This ensures that U-Boot can
+boot as a coreboot payload, based on a known-good build of coreboot.
+
+To update the `coreboot.rom` file which is used:
+
+#. Build coreboot with `CONFIG_LINEAR_FRAMEBUFFER=y`. If using `make menuconfig`
+ this is under
+ `Devices ->Display->Framebuffer mode->Linear "high resolution" framebuffer`.
+
+#. Compress the resulting `coreboot.rom`::
+
+ xz -c /path/to/coreboot/build/coreboot.rom >coreboot.rom.xz
+
+#. Upload the file to Google drive
+
+#. Send a patch to change the file ID used by wget in the CI yaml files.
--
2.41.0.694.ge786442a9b-goog
More information about the U-Boot
mailing list