[PATCH 1/1] doc: describe TPL/VPL/SPL boot

[Marek Vasut]

On 8/23/23 22:14, Pali Rohár wrote:
> On Wednesday 23 August 2023 21:57:28 Heinrich Schuchardt wrote:
>> +Booting from TPL/SPL
>> +====================
>> +
>> +The main U-Boot binary may be to large to be loaded directly by the Boot ROM.
>> +This was the main driver for splitting up U-Boot into multiple boot stages with
>> +successively larger binaries.
>> +
>> +U-Boot typically goes through the following boot phases where TPL, VPL, and SPL
>> +are optional. While many boards use SPL only few use TPL.
>> +
>> +TPL
>> +   Very early init, as tiny as possible. This loads SPL (or VPL if enabled).
> 
> This is not truth. SPL loads TPL. Or at least it was about year ago for powerpc plat.

It goes both ways.
- It can be either TPL as the Tiny Program Loader, usually hand-rolled 
in assembly, used e.g. on OneNAND devices to fit into the OneNAND memory 
mapped window and used to load the next stage (SPL) from that OneNAND 
memory into SoC SRAM, and then jump to that next stage.
- It can be SPL that loads TPL as Tertiary Program Loader , apparently 
on PPC.

>> +VPL
>> +   Optional verification step, which can select one of several SPL binaries,
>> +   if A/B verified boot is enabled. Implementation of the VPL logic is
>> +   work-in-progress. For now it just boots into SPL.
>> +
>> +SPL
>> +   Secondary program loader. Sets up SDRAM and loads U-Boot proper. It may also
>> +   load other firmware components.
> 
> SPL initializes NAND then loads TPL from NAND, TPL initialize DDR and then loads U-Boot.

Nope.