[PATCH] sunxi: psci: remove redundant initialization from psci_arch_init

Sam Edwards cfsworks at gmail.com
Fri Aug 25 20:05:32 CEST 2023

On 8/25/23 00:20, Chen-Yu Tsai wrote:

Hi Chen-Yu,

> IIRC the GIC manual says that the secure bit is set or cleared to select
> which bank of registers is accessed.

Which secure bit are we talking about here? Do we mean the *configured* 
secure bit (SCR.NS, what the code is attempting to clear) or the 
*effective* secure bit (AWPROT[1], et al)? The distinction is important 
in monitor mode (where this function runs) since there (and only there) 
the CPU core ignores the configured setting and runs in the secure world 

I'm guessing it's most likely the latter since the former isn't exposed 
outside of the CPU core, unless the GIC has some special signal going to 

> And I suppose it is here to be more robust.

...but if it is the former (i.e. SCR.NS is significant in this function) 
the code should be retained, but moved *before* the GIC register 
accesses, and the old value of SCR.NS should be restored *after*.

Either way: I don't think this line should be kept in its current form, 
because it's written in a way that strongly suggests that we want to run 
in secure mode after exiting monitor mode, which is flatly not the case.

Happy Friday all,

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