[PATCH v2] net: designware: Support high memory nodes

[Andre Przywara]

On Sat,  2 Dec 2023 10:39:49 +0100
Nils Le Roux <gilbsgilbert at gmail.com> wrote:

Hi Nils,

> Some platforms (such as the Lichee Pi 4A) have their dwmac device
> addressable only in high memory space. Storing the node's base address
> on 32 bits is not possible in such case.
> 
> Use platform's physical address type to store the base address.
> 
> Signed-off-by: Nils Le Roux <gilbsgilbert at gmail.com>
> Cc: Andre Przywara <andre.przywara at arm.com>

many thanks for the changes, that looks good to me now. I have
compile-tested that for arm64 and arm.

Reviewed-by: Andre Przywara <andre.przywara at arm.com>

Cheers,
Andre

> ---
> 
> Changes in v2:
> - explicitly define and handle ioaddr as a virtual address
> - use an intermediate variable to assign the PCI base address
> - use appropriate placeholder to print physical addresses
> ---
>  drivers/net/designware.c | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/designware.c b/drivers/net/designware.c
> index a174344b3e..78bfce07f6 100644
> --- a/drivers/net/designware.c
> +++ b/drivers/net/designware.c
> @@ -678,8 +678,8 @@ int designware_eth_probe(struct udevice *dev)
>  {
>  	struct eth_pdata *pdata = dev_get_plat(dev);
>  	struct dw_eth_dev *priv = dev_get_priv(dev);
> -	u32 iobase = pdata->iobase;
> -	ulong ioaddr;
> +	phys_addr_t iobase = pdata->iobase;
> +	void *ioaddr;
>  	int ret, err;
>  	struct reset_ctl_bulk reset_bulk;
>  #ifdef CONFIG_CLK
> @@ -740,16 +740,18 @@ int designware_eth_probe(struct udevice *dev)
>  	 * or via a PCI bridge, fill in plat before we probe the hardware.
>  	 */
>  	if (IS_ENABLED(CONFIG_PCI) && device_is_on_pci_bus(dev)) {
> -		dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase);
> -		iobase &= PCI_BASE_ADDRESS_MEM_MASK;
> -		iobase = dm_pci_mem_to_phys(dev, iobase);
> +		u32 pcibase;
>  
> +		dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &pcibase);
> +		pcibase &= PCI_BASE_ADDRESS_MEM_MASK;
> +
> +		iobase = dm_pci_mem_to_phys(dev, pcibase);
>  		pdata->iobase = iobase;
>  		pdata->phy_interface = PHY_INTERFACE_MODE_RMII;
>  	}
>  
> -	debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
> -	ioaddr = iobase;
> +	debug("%s, iobase=%pa, priv=%p\n", __func__, &iobase, priv);
> +	ioaddr = phys_to_virt(iobase);
>  	priv->mac_regs_p = (struct eth_mac_regs *)ioaddr;
>  	priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr + DW_DMA_BASE_OFFSET);
>  	priv->interface = pdata->phy_interface;