[PATCH] Add imx93-var-som support
Fabio Estevam
festevam at gmail.com
Wed Dec 13 19:22:12 CET 2023
Hi Mathieu,
On Sat, Dec 9, 2023 at 9:57 AM Mathieu Othacehe <m.othacehe at gmail.com> wrote:
>
> Add support for the Variscite VAR-SOM-IMX93 evaluation kit. The SoM
> consists of an NXP iMX93 dual A55 CPU. The SoM is mounted on a Variscite
> Symphony SBC.
>
> Signed-off-by: Mathieu Othacehe <m.othacehe at gmail.com>
> ---
> arch/arm/dts/Makefile | 3 +-
> .../dts/imx93-var-som-symphony-u-boot.dtsi | 152 ++
> arch/arm/dts/imx93-var-som-symphony.dts | 223 +++
> arch/arm/dts/imx93-var-som.dtsi | 205 +++
> arch/arm/include/asm/arch-imx9/clock.h | 1 +
> arch/arm/mach-imx/imx9/Kconfig | 6 +
> board/variscite/common/Kconfig | 6 +
> board/variscite/common/eth.c | 59 +
> board/variscite/common/eth.h | 12 +
> board/variscite/common/extcon-ptn5150.c | 137 ++
> board/variscite/common/extcon-ptn5150.h | 40 +
> board/variscite/common/imx9_eeprom.c | 188 +++
> board/variscite/common/imx9_eeprom.h | 83 +
> board/variscite/common/mmc.c | 47 +
> board/variscite/imx93_var_som/Kconfig | 14 +
> board/variscite/imx93_var_som/Makefile | 18 +
> board/variscite/imx93_var_som/imx93_var_som.c | 147 ++
> .../variscite/imx93_var_som/lpddr4x_timing.c | 1489 +++++++++++++++++
> board/variscite/imx93_var_som/spl.c | 146 ++
> configs/imx93_var_som_defconfig | 161 ++
> include/configs/imx93_var_som.h | 175 ++
> 21 files changed, 3311 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi
> create mode 100644 arch/arm/dts/imx93-var-som-symphony.dts
> create mode 100644 arch/arm/dts/imx93-var-som.dtsi
> create mode 100644 board/variscite/common/Kconfig
> create mode 100644 board/variscite/common/eth.c
> create mode 100644 board/variscite/common/eth.h
> create mode 100644 board/variscite/common/extcon-ptn5150.c
> create mode 100644 board/variscite/common/extcon-ptn5150.h
> create mode 100644 board/variscite/common/imx9_eeprom.c
> create mode 100644 board/variscite/common/imx9_eeprom.h
> create mode 100644 board/variscite/common/mmc.c
> create mode 100644 board/variscite/imx93_var_som/Kconfig
> create mode 100644 board/variscite/imx93_var_som/Makefile
> create mode 100644 board/variscite/imx93_var_som/imx93_var_som.c
> create mode 100644 board/variscite/imx93_var_som/lpddr4x_timing.c
> create mode 100644 board/variscite/imx93_var_som/spl.c
> create mode 100644 configs/imx93_var_som_defconfig
> create mode 100644 include/configs/imx93_var_som.h
Please add a MAINTAINERS file for this board.
It would also be helpful to add doc/board/variscite/imx93_var_som.rst
that explains
how to build U-Boot for this board, how to get the firmware, ATF,
binaries, etc, and how to flash it to the boot medium.
> --- /dev/null
> +++ b/arch/arm/dts/imx93-var-som-symphony.dts
Please also submit the imx93-var-som-symphony.dts support to Linux so that
it can get reviewed by the DT folks.
> +++ b/board/variscite/common/Kconfig
> @@ -0,0 +1,6 @@
> +config EXTCON_PTN5150
> + bool "NXP PTN5150 CC LOGIC USB EXTCON support"
This should be converted to a proper driver.
To not block the board support, I suggest sending a v2 without PTN5150
support for now.
> + default n
'default n' is already the default. Please drop it.
> --- /dev/null
> +++ b/board/variscite/common/eth.c
> @@ -0,0 +1,59 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2023 Variscite Ltd.
> + */
> +#include <common.h>
> +#include <net.h>
> +#include <miiphy.h>
> +#include <env.h>
> +#include "../common/imx9_eeprom.h"
> +
> +#define CHAR_BIT 8
> + if (!is_valid_ethaddr(enetaddr))
> + return -1;
return -EINVAL;
> +/* Returns carrier board revision string via 'rev' argument.
> + * For legacy carrier board revisions the "legacy" string is returned.
> + * For new carrier board revisions the actual carrier revision is returned.
> + * Symphony-Board 1.4 and below are legacy, 1.4a and above are new.
> + * DT8MCustomBoard 1.4 and below are legacy, 2.0 and above are new.
> + */
The correct style for multi-line comment is:
/*
* Line 1 bla bla
* line 2
*
*/
> +
> + /* 0.9v
> + */
Same here. Either remove or provide a better comment.
> + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
> + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
> +
> + /* set standby voltage to 0.65v */
0.65V, not v.
> +/* Initial environment variables */
> +#define CFG_EXTRA_ENV_SETTINGS \
> + BOOTENV \
> + AHAB_ENV \
> + "initrd_addr=0x83800000\0" \
> + "emmc_dev=0\0"\
> + "sd_dev=1\0" \
> + "scriptaddr=0x83500000\0" \
> + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
> + "image=Image.gz\0" \
> + "img_addr=0x82000000\0" \
> + "splashimage=0x90000000\0" \
> + "console=ttyLP0,115200 earlycon\0" \
> + "fdt_addr_r=0x83000000\0" \
> + "fdt_addr=0x83000000\0" \
...
The recommendation for the new boards is to add the environment to an env file.
In this case, it would be board/variscite/imx93_var_som/imx93_var_som.env.
See board/cloos/imx8mm_phg/imx8mm_phg.env as reference.
> +
> +/* Link Definitions */
Maybe just drop this comment.
> +#define CFG_SYS_INIT_RAM_ADDR 0x80000000
> +#define CFG_SYS_INIT_RAM_SIZE 0x200000
> +
> +#define CFG_SYS_SDRAM_BASE 0x80000000
> +#define PHYS_SDRAM 0x80000000
> +#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
> +
> +#define DEFAULT_SDRAM_SIZE (512 * SZ_1M) /* 512MB Minimum DDR4, see get_dram_size */
> +#define VAR_EEPROM_DRAM_START (PHYS_SDRAM + (DEFAULT_SDRAM_SIZE >> 1))
> +#define VAR_SOM_EEPROM_I2C_NAME "i2c at 42530000"
> +#define VAR_CARRIER_EEPROM_I2C_NAME "i2c at 44340000"
> +
> +#define CFG_SYS_FSL_USDHC_NUM 2
> +
> +/* Using ULP WDOG for reset */
> +#define WDOG_BASE_ADDR WDG3_BASE_ADDR
Is this needed now that we use DM?
> +
> +#if defined(CONFIG_CMD_NET)
> +#define CFG_FEC_XCV_TYPE RGMII
> +#define CFG_FEC_MXC_PHYADDR 5
Same here.
> +#define DWC_NET_PHYADDR 0
Is this needed?
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