[PATCH v2 17/17] configs: Enable HDMI Out for ROC-RK3328-CC

[Jagan Teki]

U-Boot 2024.01-rc4-00053-gb9f7cafdd9-dirty (Dec 11 2023 - 13:18:15 +0530)

Model: Firefly roc-rk3328-cc
DRAM:  1 GiB (effective 1022 MiB)
PMIC:  RK8050 (on=0x40, off=0x00)
Core:  236 devices, 26 uclasses, devicetree: separate
MMC:   mmc at ff500000: 1, mmc at ff520000: 0
Loading Environment from MMC... *** Warning - bad CRC, using default environment

tmdsclock = 148500000; chipversion = 1
In:    serial
Out:   vidconsole
Err:   vidconsole
Model: Firefly roc-rk3328-cc
Net:   eth0: ethernet at ff540000
Hit any key to stop autoboot:  0
=> dm tree
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 root          0  [ + ]   root_driver           root_driver
 firmware      0  [   ]   psci                  |-- psci
 clk           0  [ + ]   fixed_clock           |-- xin24m
 syscon        0  [ + ]   rockchip_rk3328_grf   |-- syscon at ff100000
 serial        0  [ + ]   ns16550_serial        |-- serial at ff130000
 i2c           0  [ + ]   rockchip_rk3066_i2c   |-- i2c at ff160000
 pmic          0  [ + ]   rockchip_rk805        |   `-- pmic at 18
 sysreset      0  [   ]   rk8xx_sysreset        |       |-- rk8xx_sysreset
 regulator     0  [ + ]   rk8xx_buck            |       |-- DCDC_REG1
 regulator     1  [ + ]   rk8xx_buck            |       |-- DCDC_REG2
 regulator     2  [ + ]   rk8xx_buck            |       |-- DCDC_REG3
 regulator     3  [ + ]   rk8xx_buck            |       |-- DCDC_REG4
 regulator     4  [ + ]   rk8xx_ldo             |       |-- LDO_REG1
 regulator     5  [ + ]   rk8xx_ldo             |       |-- LDO_REG2
 regulator     6  [ + ]   rk8xx_ldo             |       `-- LDO_REG3
 video         0  [ + ]   rk3328_vop            |-- vop at ff370000
 vidconsole    0  [ + ]   vidconsole0           |   `-- vop at ff370000.vidconsole0
 display       0  [ + ]   rk3328_hdmi_rockchip  |-- hdmi at ff3c0000
 phy           0  [ + ]   inno_hdmi_phy         |-- phy at ff430000
 clk           1  [ + ]   rockchip_rk3328_cru   |-- clock-controller at ff440000
 sysreset      1  [   ]   rockchip_sysreset     |   |-- sysreset
 reset         0  [ + ]   rockchip_reset        |   `-- reset

Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
---
Changes for v2:
- none

 configs/roc-cc-rk3328_defconfig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 4ac3c9403b..4eef9016dc 100644
--- a/configs/roc-cc-rk3328_defconfig
+++ b/configs/roc-cc-rk3328_defconfig
@@ -79,6 +79,7 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_HDMI=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
@@ -114,6 +115,10 @@ CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
-- 
2.25.1