[PATCH] riscv: Extend board compatible string with "qemu,mbv"
Michal Simek
michal.simek at amd.com
Wed Dec 20 15:53:28 CET 2023
Extend compatible string to match the latest change in dt binding.
Fixes: 7576ab2facae ("riscv: Add support for AMD/Xilinx MicroBlaze V")
Signed-off-by: Michal Simek <michal.simek at amd.com>
---
dt binding patch is available here.
https://lore.kernel.org/all/69670e5a46c98a2eb73d4f2e2d571a27c46b4640.1700722941.git.michal.simek@amd.com/
---
arch/riscv/dts/xilinx-mbv32.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/dts/xilinx-mbv32.dts b/arch/riscv/dts/xilinx-mbv32.dts
index 6a6b8b694bd1..94e42c268115 100644
--- a/arch/riscv/dts/xilinx-mbv32.dts
+++ b/arch/riscv/dts/xilinx-mbv32.dts
@@ -12,7 +12,7 @@
#address-cells = <1>;
#size-cells = <1>;
model = "AMD MicroBlaze V 32bit";
- compatible = "amd,mbv";
+ compatible = "qemu,mbv", "amd,mbv";
cpus: cpus {
#address-cells = <1>;
--
2.36.1
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