[PATCH v3 5/7] mmc: bcmstb: Add support for bcm2712 SD controller

[Stefan Wahren]

Hi,

Am 21.12.23 um 16:13 schrieb Florian Fainelli:
>
>
> On 12/18/2023 10:03 PM, Ivan T. Ivanov wrote:
>> Borrow SD quirks from vendor Linux driver.
>>
>> "BCM2712 unfortunately carries with it a perennial bug with the SD
>> controller register interface present on previous chips
>> (2711/2709/2708).
>> Accesses must be dword-sized and a read-modify-write cycle to the 32-bit
>> registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and
>> BLOCK_COUNT registers tramples the upper/lower 16 bits of data written.
>> BCM2712 does not seem to need the extreme delay between each write as on
>> previous chips, just the serialisation of writes to these registers in a
>> single 32-bit operation."
>>
>> Signed-off-by: Ivan T. Ivanov <iivanov at suse.de>
>
> This is diverging from the Linux sdhci-brcmstb.c driver where no such
> quirk needs to be carried out, rather the logic for such quirks has
> been present in sdhci-iproc.c...

it seems this patch based the downstream kernel changes [1]. I would
suggest to use an existing driver which already handle this bug
(iproc_sdhci or bcm2835_sdhci).

Does the Rpi 5 still works, if the compatible "brcm,bcm2712-sdhci" is
added to mmc/iproc_sdhci.c?

[1] -
https://github.com/raspberrypi/linux/commit/b627647c4500d39cb026924b608841fdf4d4d7e9