[PATCH v2 07/32] serial: msm: fix clock handling
Neil Armstrong
neil.armstrong at linaro.org
Thu Dec 21 17:17:51 CET 2023
On 19/12/2023 17:04, Caleb Connolly wrote:
> Use the modern helpers to fetch the clock and use the correct property
> ("clocks" instead of "clock")
>
> Signed-off-by: Caleb Connolly <caleb.connolly at linaro.org>
> ---
> arch/arm/dts/dragonboard410c.dts | 3 ++-
> arch/arm/dts/dragonboard820c.dts | 3 ++-
> drivers/serial/serial_msm.c | 24 +++++-------------------
> 3 files changed, 9 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
> index 02c824d0226c..c395e6cc0427 100644
> --- a/arch/arm/dts/dragonboard410c.dts
> +++ b/arch/arm/dts/dragonboard410c.dts
> @@ -84,7 +84,8 @@
> serial at 78b0000 {
> compatible = "qcom,msm-uartdm-v1.4";
> reg = <0x78b0000 0x200>;
> - clock = <&clkc 4>;
> + clocks = <&clkc 4>;
> + clock-names = "core";
> pinctrl-names = "uart";
> pinctrl-0 = <&blsp1_uart>;
> };
> diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts
> index 146a0af8aafe..86b7f83d36d6 100644
> --- a/arch/arm/dts/dragonboard820c.dts
> +++ b/arch/arm/dts/dragonboard820c.dts
> @@ -78,7 +78,8 @@
> blsp2_uart2: serial at 75b0000 {
> compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> reg = <0x75b0000 0x1000>;
> - clock = <&gcc 4>;
> + clocks = <&gcc 4>;
> + clock-names = "core";
> pinctrl-names = "uart";
> pinctrl-0 = <&blsp8_uart>;
> };
> diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> index 19a5a3a788f7..0148ddb54df6 100644
> --- a/drivers/serial/serial_msm.c
> +++ b/drivers/serial/serial_msm.c
> @@ -160,29 +160,14 @@ static int msm_uart_clk_init(struct udevice *dev)
> {
> uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
> "clock-frequency", 115200);
> - uint clkd[2]; /* clk_id and clk_no */
> - int clk_offset;
> - struct udevice *clk_dev;
> struct clk clk;
> int ret;
>
> - ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "clock",
> - clkd, 2);
> - if (ret)
> - return ret;
> -
> - clk_offset = fdt_node_offset_by_phandle(gd->fdt_blob, clkd[0]);
> - if (clk_offset < 0)
> - return clk_offset;
> -
> - ret = uclass_get_device_by_of_offset(UCLASS_CLK, clk_offset, &clk_dev);
> - if (ret)
> - return ret;
> -
> - clk.id = clkd[1];
> - ret = clk_request(clk_dev, &clk);
> - if (ret < 0)
> + ret = clk_get_by_name(dev, "core", &clk);
> + if (ret < 0) {
> + pr_warn("%s: Failed to get clock: %d\n", __func__, ret);
> return ret;
> + }
>
> ret = clk_set_rate(&clk, clk_rate);
> clk_free(&clk);
> @@ -252,6 +237,7 @@ U_BOOT_DRIVER(serial_msm) = {
> .priv_auto = sizeof(struct msm_serial_data),
> .probe = msm_serial_probe,
> .ops = &msm_serial_ops,
> + .flags = DM_FLAG_PRE_RELOC,
Is this flag introduction related to this particular clock property name change ?
> };
>
> #ifdef CONFIG_DEBUG_UART_MSM
>
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