[PATCH v2 06/32] serial: msm: add debug UART
Neil Armstrong
neil.armstrong at linaro.org
Thu Dec 21 17:41:52 CET 2023
On 19/12/2023 17:04, Caleb Connolly wrote:
> Introduce support for early debugging.
>
> Signed-off-by: Caleb Connolly <caleb.connolly at linaro.org>
> ---
> drivers/serial/Kconfig | 8 ++++++++
> drivers/serial/serial_msm.c | 32 ++++++++++++++++++++++++++++++++
> 2 files changed, 40 insertions(+)
>
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 81fdac047824..20713812c839 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -304,6 +304,14 @@ config DEBUG_UART_S5P
> will need to provide parameters to make this work. The driver will
> be available until the real driver-model serial is running.
>
> +config DEBUG_UART_MSM
> + bool "Qualcomm QUP UART debug"
> + depends on ARCH_SNAPDRAGON
> + help
> + Select this to enable a debug UART using the serial_msm driver. You
> + will need to provide parameters to make this work. The driver will
> + be available until the real driver-model serial is running.
I'm confused, perhaps the config should be named DEBUG_UART_MSM_QUP ?
> +
> config DEBUG_UART_MSM_GENI
> bool "Qualcomm snapdragon"
> depends on ARCH_SNAPDRAGON
> diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> index a22623c316ed..19a5a3a788f7 100644
> --- a/drivers/serial/serial_msm.c
> +++ b/drivers/serial/serial_msm.c
> @@ -253,3 +253,35 @@ U_BOOT_DRIVER(serial_msm) = {
> .probe = msm_serial_probe,
> .ops = &msm_serial_ops,
> };
> +
> +#ifdef CONFIG_DEBUG_UART_MSM
> +
> +static struct msm_serial_data init_serial_data = {
> + .base = CONFIG_VAL(DEBUG_UART_BASE),
> + .clk_bit_rate = UART_DM_CLK_RX_TX_BIT_RATE,
> +};
> +
> +#include <debug_uart.h>
> +
> +static inline void _debug_uart_init(void)
> +{
> + uart_dm_init(&init_serial_data);
> +}
> +
> +static inline void _debug_uart_putc(int ch)
> +{
> + struct msm_serial_data *priv = &init_serial_data;
> +
> + while (!(readl(priv->base + UARTDM_SR) & UARTDM_SR_TX_EMPTY) &&
> + !(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY))
> + ;
> +
> + writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR);
> +
> + writel(1, priv->base + UARTDM_NCF_TX);
> + writel(ch, priv->base + UARTDM_TF);
> +}
> +
> +DEBUG_UART_FUNCS
> +
> +#endif
>
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