[PATCH v2 01/30] mtd: spi-nor: Add config to enable flash DTR

[Bhumkar, Tejas Arvind]

[AMD Official Use Only - General]

Hi Jagan,

> -----Original Message-----
> From: Jagan Teki <jagan at amarulasolutions.com>
> Sent: Wednesday, December 20, 2023 1:00 PM
> To: Bhumkar, Tejas Arvind <tejas.arvind.bhumkar at amd.com>
> Cc: u-boot at lists.denx.de; joe.hershberger at ni.com; rfried.dev at gmail.com;
> Simek, Michal <michal.simek at amd.com>; vigneshr at ti.com; git at xilinx.com; T
> Karthik Reddy <t.karthik.reddy at amd.com>
> Subject: Re: [PATCH v2 01/30] mtd: spi-nor: Add config to enable flash DTR
>
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>
> On Wed, Dec 6, 2023 at 3:02 PM Tejas Bhumkar
> <tejas.arvind.bhumkar at amd.com> wrote:
> >
> > From: T Karthik Reddy <t.karthik.reddy at amd.com>
> >
> > The spi-nor framework will set up the flash parameters by reading the
> > flash id table flags, which include cmd opcodes, address width, dummy
> > bytes, and bus width. In case, flash supports octal DTR mode and the
> > controller does not support the DTR. There is no process to switch
> > back to SDR mode.
> > To avoid this issue, create a Kconfig option SPI_FLASH_DTR_ENABLE to
> > explicitly specify to enable/disable flash DTR support.
> > This config is disabled by default.
>
> We cannot control controller fixup in flash, DTR read based on the DTR flag I don't
> think adding extra CONFIG to hack the controller with impact is.
[Tejas] : By default, this configuration is set to Disabled. It serves as a convenient option for operating the flash
        between SDR and DDR without requiring any adjustments to the nor-id table flags.

Regards,
Tejas.
>
> Jagan,