[PATCH 2/2] configs: imx: imx8mm_beacon: Add config option for QSPI booting

Wed Feb 1 14:06:46 CET 2023

Hi Adam,

I haven't picked up these two patches in my PR due to a small thing (at 
least, what I could see). There are a couple of new CONFIG_ in header 
(CONFIG_SYS_UBOOT_BASE, CFG_ as now is okay), but new CONFIG_ should be 
managed only by Kbuild and are not allowed.

My pipeline failed, see here:

https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/566141

On 19.11.22 20:28, Adam Ford wrote:
> The imx8mm_beacon SOM has a QSPI part attached to the FSPI controller.
> Update the header and spl files to support booting from NOR flash and
> add imx8mm_beacon_fspi_defconfig to support this configuration.
> 
> Signed-off-by: Adam Ford <aford173 at gmail.com>
> 
> diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c
> index a5f337aa17..4beda0c62d 100644
> --- a/board/beacon/imx8mm/spl.c
> +++ b/board/beacon/imx8mm/spl.c
> @@ -36,6 +36,8 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
>   		return BOOT_DEVICE_MMC2;
>   	case USB_BOOT:
>   		return BOOT_DEVICE_BOARD;
> +	case QSPI_BOOT:
> +		return BOOT_DEVICE_NOR;
>   	default:
>   		return BOOT_DEVICE_NONE;
>   	}
> diff --git a/configs/imx8mm_beacon_fspi_defconfig b/configs/imx8mm_beacon_fspi_defconfig
> new file mode 100644
> index 0000000000..805fd3f671
> --- /dev/null
> +++ b/configs/imx8mm_beacon_fspi_defconfig
> @@ -0,0 +1,155 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_IMX8M=y
> +CONFIG_TEXT_BASE=0x40200000
> +CONFIG_SYS_MALLOC_LEN=0x2000000
> +CONFIG_SPL_GPIO=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_ENV_SIZE=0x2000
> +CONFIG_ENV_OFFSET=0xFFFFDE00
> +CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
> +CONFIG_DM_GPIO=y
> +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit"
> +CONFIG_SPL_TEXT_BASE=0x7E2000
> +CONFIG_TARGET_IMX8MM_BEACON=y
> +CONFIG_SYS_PROMPT="u-boot=> "
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_DRIVERS_MISC=y
> +CONFIG_SPL=y
> +CONFIG_SYS_LOAD_ADDR=0x40480000
> +CONFIG_LTO=y
> +CONFIG_SYS_MONITOR_LEN=524288
> +CONFIG_FIT=y
> +CONFIG_FIT_EXTERNAL_OFFSET=0x3000
> +CONFIG_SPL_LOAD_FIT=y
> +# CONFIG_USE_SPL_FIT_GENERATOR is not set
> +CONFIG_OF_SYSTEM_SETUP=y
> +CONFIG_USE_BOOTCOMMAND=y
> +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;"
> +CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb"
> +CONFIG_SPL_MAX_SIZE=0x25000
> +CONFIG_SPL_PAD_TO=0x0
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x910000
> +CONFIG_SPL_BSS_MAX_SIZE=0x2000
> +CONFIG_SPL_BOARD_INIT=y
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK=0x920000
> +CONFIG_SYS_SPL_MALLOC=y
> +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
> +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000
> +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
> +CONFIG_SPL_CRC32=y
> +CONFIG_SPL_I2C=y
> +CONFIG_SPL_NOR_SUPPORT=y
> +CONFIG_SPL_POWER=y
> +CONFIG_SPL_USB_HOST=y
> +CONFIG_SPL_USB_GADGET=y
> +CONFIG_SPL_USB_SDP_SUPPORT=y
> +CONFIG_SPL_WATCHDOG=y
> +CONFIG_HUSH_PARSER=y
> +CONFIG_SYS_MAXARGS=64
> +CONFIG_SYS_CBSIZE=2048
> +CONFIG_SYS_PBSIZE=2074
> +CONFIG_SYS_BOOTM_LEN=0x800000
> +# CONFIG_CMD_EXPORTENV is not set
> +# CONFIG_CMD_IMPORTENV is not set
> +# CONFIG_CMD_CRC32 is not set
> +CONFIG_CMD_CLK=y
> +CONFIG_CMD_FUSE=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_USB_SDP=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> +CONFIG_CMD_DHCP=y
> +CONFIG_CMD_MII=y
> +CONFIG_CMD_PING=y
> +CONFIG_CMD_CACHE=y
> +CONFIG_CMD_PMIC=y
> +CONFIG_CMD_REGULATOR=y
> +CONFIG_CMD_EXT2=y
> +CONFIG_CMD_EXT4=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_CMD_FAT=y
> +CONFIG_OF_CONTROL=y
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_ENV_OVERWRITE=y
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_SYS_MMC_ENV_DEV=2
> +CONFIG_SYS_MMC_ENV_PART=2
> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> +CONFIG_USE_ETHPRIME=y
> +CONFIG_ETHPRIME="FEC"
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_SPL_DM=y
> +CONFIG_SPL_CLK_COMPOSITE_CCF=y
> +CONFIG_CLK_COMPOSITE_CCF=y
> +CONFIG_SPL_CLK_IMX8MM=y
> +CONFIG_CLK_IMX8MM=y
> +CONFIG_MXC_GPIO=y
> +CONFIG_DM_PCA953X=y
> +CONFIG_DM_I2C=y
> +CONFIG_SUPPORT_EMMC_BOOT=y
> +CONFIG_MMC_IO_VOLTAGE=y
> +CONFIG_MMC_UHS_SUPPORT=y
> +CONFIG_MMC_HS400_ES_SUPPORT=y
> +CONFIG_MMC_HS400_SUPPORT=y
> +CONFIG_FSL_USDHC=y
> +CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SF_DEFAULT_MODE=0
> +CONFIG_SF_DEFAULT_SPEED=40000000
> +CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_MTD=y
> +CONFIG_PHYLIB=y
> +CONFIG_PHY_ATHEROS=y
> +CONFIG_PHY_GIGE=y
> +CONFIG_FEC_MXC=y
> +CONFIG_MII=y
> +CONFIG_SPL_PHY=y
> +CONFIG_SPL_NOP_PHY=y
> +CONFIG_PINCTRL=y
> +CONFIG_SPL_PINCTRL=y
> +CONFIG_PINCTRL_IMX8M=y
> +CONFIG_POWER_DOMAIN=y
> +CONFIG_IMX8M_POWER_DOMAIN=y
> +CONFIG_DM_PMIC=y
> +# CONFIG_SPL_PMIC_CHILDREN is not set
> +CONFIG_DM_PMIC_BD71837=y
> +CONFIG_SPL_DM_PMIC_BD71837=y
> +CONFIG_DM_REGULATOR=y
> +CONFIG_DM_REGULATOR_BD71837=y
> +CONFIG_DM_REGULATOR_FIXED=y
> +CONFIG_DM_REGULATOR_GPIO=y
> +CONFIG_DM_SERIAL=y
> +CONFIG_MXC_UART=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_NXP_FSPI=y
> +CONFIG_SYSRESET=y
> +CONFIG_SPL_SYSRESET=y
> +CONFIG_SYSRESET_PSCI=y
> +CONFIG_SYSRESET_WATCHDOG=y
> +CONFIG_DM_THERMAL=y
> +CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_MXC_USB_OTG_HACTIVE=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0525
> +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
> +CONFIG_CI_UDC=y
> +CONFIG_SDP_LOADADDR=0x40400000
> +CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_IMX_WATCHDOG=y
> +CONFIG_FSPI_CONF_HEADER=y
> +CONFIG_FSPI_CONF_FILE="fspi_header.bin"
> diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
> index 8e08899458..cab4a02c18 100644
> --- a/include/configs/imx8mm_beacon.h
> +++ b/include/configs/imx8mm_beacon.h
> @@ -9,8 +9,17 @@
>   #include <linux/sizes.h>
>   #include <asm/arch/imx-regs.h>
>   
> +#define UBOOT_ITB_OFFSET			0x57C00
> +#define FSPI_CONF_BLOCK_SIZE		0x1000
> +#define UBOOT_ITB_OFFSET_FSPI  \
> +	(UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE)
> +#ifdef CONFIG_FSPI_CONF_HEADER
> +#define CONFIG_SYS_UBOOT_BASE  \

See here, it was renamed as CFG_SYS_UBOOT_BASE

> +	(QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI)
> +#else
>   #define CONFIG_SYS_UBOOT_BASE	\
>   	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
> +#endif
>   
>   #ifdef CONFIG_SPL_BUILD
>   /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */

Best regards,
Stefano

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