[PATCH v3 57/76] sh4: Drop unused pci_sh7780 driver

Simon Glass sjg at chromium.org
Wed Feb 1 21:20:08 CET 2023


This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

(no changes since v1)

 arch/sh/include/asm/pci.h |  2 -
 drivers/pci/Makefile      |  1 -
 drivers/pci/pci_sh7780.c  | 92 ---------------------------------------
 3 files changed, 95 deletions(-)
 delete mode 100644 drivers/pci/pci_sh7780.c

diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 5d79d0ec58e..18b95ff5cfb 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -13,8 +13,6 @@
 #include <pci.h>
 #if defined(CONFIG_SH7751_PCI)
 int pci_sh7751_init(struct pci_controller *hose);
-#elif defined(CONFIG_SH7780_PCI)
-int pci_sh7780_init(struct pci_controller *hose);
 #else
 #error "Not support PCI."
 #endif
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index d393f1ba031..49506e7ba59 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -22,7 +22,6 @@ obj-$(CONFIG_PCI_MVEBU) += pci_mvebu.o
 obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
 obj-$(CONFIG_PCI_RCAR_GEN3) += pci-rcar-gen3.o
 obj-$(CONFIG_SH7751_PCI) +=pci_sh7751.o
-obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
 obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o
 obj-$(CONFIG_PCIE_IPROC) += pcie_iproc.o
 obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
diff --git a/drivers/pci/pci_sh7780.c b/drivers/pci/pci_sh7780.c
deleted file mode 100644
index 7533286c015..00000000000
--- a/drivers/pci/pci_sh7780.c
+++ /dev/null
@@ -1,92 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SH7780 PCI Controller (PCIC) for U-Boot.
- * (C) Dustin McIntire (dustin at sensoria.com)
- * (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
- * (C) 2008 Yusuke Goda <goda.yusuke at renesas.com>
- */
-
-#include <common.h>
-#include <linux/delay.h>
-
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/pci.h>
-#include <asm/io.h>
-
-#define SH7780_VENDOR_ID	0x1912
-#define SH7780_DEVICE_ID	0x0002
-#define SH7780_PCICR_PREFIX	0xA5000000
-#define SH7780_PCICR_PFCS	0x00000800
-#define SH7780_PCICR_FTO	0x00000400
-#define SH7780_PCICR_PFE	0x00000200
-#define SH7780_PCICR_TBS	0x00000100
-#define SH7780_PCICR_ARBM	0x00000040
-#define SH7780_PCICR_IOCS	0x00000004
-#define SH7780_PCICR_PRST	0x00000002
-#define SH7780_PCICR_CFIN	0x00000001
-
-#define p4_in(addr)			(*(vu_long *)addr)
-#define p4_out(data, addr)	(*(vu_long *)addr) = (data)
-#define p4_inw(addr)		(*(vu_short *)addr)
-#define p4_outw(data, addr)	(*(vu_short *)addr) = (data)
-
-int pci_sh4_read_config_dword(struct pci_controller *hose,
-				    pci_dev_t dev, int offset, u32 *value)
-{
-	u32 par_data = PCI_CONF1_ADDRESS(PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), offset);
-
-	p4_out(par_data, SH7780_PCIPAR);
-	*value = p4_in(SH7780_PCIPDR);
-
-	return 0;
-}
-
-int pci_sh4_write_config_dword(struct pci_controller *hose,
-				     pci_dev_t dev, int offset, u32 value)
-{
-	u32 par_data = PCI_CONF1_ADDRESS(PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), offset);
-
-	p4_out(par_data, SH7780_PCIPAR);
-	p4_out(value, SH7780_PCIPDR);
-	return 0;
-}
-
-int pci_sh7780_init(struct pci_controller *hose)
-{
-	p4_out(0x01, SH7780_PCIECR);
-
-	if (p4_inw(SH7780_PCIVID) != SH7780_VENDOR_ID
-	    && p4_inw(SH7780_PCIDID) != SH7780_DEVICE_ID) {
-		printf("PCI: Unknown PCI host bridge.\n");
-		return -1;
-	}
-	printf("PCI: SH7780 PCI host bridge found.\n");
-
-	/* Toggle PCI reset pin */
-	p4_out((SH7780_PCICR_PREFIX | SH7780_PCICR_PRST), SH7780_PCICR);
-	udelay(100000);
-	p4_out(SH7780_PCICR_PREFIX, SH7780_PCICR);
-	p4_outw(0x0047, SH7780_PCICMD);
-
-	p4_out(CONFIG_SH7780_PCI_LSR, SH7780_PCILSR0);
-	p4_out(CONFIG_SH7780_PCI_LAR, SH7780_PCILAR0);
-	p4_out(0x00000000, SH7780_PCILSR1);
-	p4_out(0, SH7780_PCILAR1);
-	p4_out(CONFIG_SH7780_PCI_BAR, SH7780_PCIMBAR0);
-	p4_out(0x00000000, SH7780_PCIMBAR1);
-
-	p4_out(0xFD000000, SH7780_PCIMBR0);
-	p4_out(0x00FC0000, SH7780_PCIMBMR0);
-
-	/* if use Operand Cache then enable PCICSCR Soonp bits. */
-	p4_out(0x08000000, SH7780_PCICSAR0);
-	p4_out(0x0000001B, SH7780_PCICSCR0);	/* Snoop bit :On */
-
-	p4_out((SH7780_PCICR_PREFIX | SH7780_PCICR_CFIN | SH7780_PCICR_ARBM
-	      | SH7780_PCICR_FTO | SH7780_PCICR_PFCS | SH7780_PCICR_PFE),
-	     SH7780_PCICR);
-
-	pci_sh4_init(hose);
-	return 0;
-}
-- 
2.39.1.456.gfc5497dd1b-goog



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