[PATCH 4/9] net: dwc_eth_qos: Set DMA_MODE SWR bit to reset the MAC

[Ramon Fried]

On Thu, Jan 19, 2023 at 11:45 PM Marek Vasut <marex at denx.de> wrote:
>
> The driver currently only waits for DMA_MODE SWR bit to clear itself.
> This is insufficient e.g. on i.MX8M Plus, where the MAC must be reset
> before IOMUX GPR[1] content is latched into the MAC and used. Without
> the proper reset, the i.MX8M Plus MAC variant does not take the value
> in IOMUX GPR[1] into account, which makes it impossible e.g. to switch
> interface mode from RGMII to any other.
>
> Since proper reset is desired in general to put the block into defined
> state, always assert the DMA_MODE SWR bit before waiting for the bit
> to clear itself.
>
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: "Ariel D'Alessandro" <ariel.dalessandro at collabora.com>
> Cc: "NXP i.MX U-Boot Team" <uboot-imx at nxp.com>
> Cc: Andrey Zhizhikin <andrey.zhizhikin at leica-geosystems.com>
> Cc: Fabio Estevam <festevam at gmail.com>
> Cc: Joe Hershberger <joe.hershberger at ni.com>
> Cc: Lukasz Majewski <lukma at denx.de>
> Cc: Marcel Ziswiler <marcel.ziswiler at toradex.com>
> Cc: Marek Vasut <marex at denx.de>
> Cc: Michael Trimarchi <michael at amarulasolutions.com>
> Cc: Peng Fan <peng.fan at nxp.com>
> Cc: Ramon Fried <rfried.dev at gmail.com>
> Cc: Sean Anderson <seanga2 at gmail.com>
> Cc: Stefano Babic <sbabic at denx.de>
> Cc: Tim Harvey <tharvey at gateworks.com>
> Cc: Tommaso Merciai <tommaso.merciai at amarulasolutions.com>
> Cc: u-boot at lists.denx.de
> ---
>  drivers/net/dwc_eth_qos.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> index cd2def4ba21..d488bd0c288 100644
> --- a/drivers/net/dwc_eth_qos.c
> +++ b/drivers/net/dwc_eth_qos.c
> @@ -761,6 +761,12 @@ static int eqos_start(struct udevice *dev)
>
>         eqos->reg_access_ok = true;
>
> +       /*
> +        * Assert the SWR first, the actually reset the MAC and to latch in
> +        * e.g. i.MX8M Plus GPR[1] content, which selects interface mode.
> +        */
> +       setbits_le32(&eqos->dma_regs->mode, EQOS_DMA_MODE_SWR);
> +
>         ret = wait_for_bit_le32(&eqos->dma_regs->mode,
>                                 EQOS_DMA_MODE_SWR, false,
>                                 eqos->config->swr_wait, false);
> --
> 2.39.0
>
Reviewed-by: Ramon Fried <rfried.dev at gmail.com>