[PATCH v2 096/169] Correct SPL uses of GMAC_ROCKCHIP

[Simon Glass]

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_GMAC_ROCKCHIP defined in Kconfig

Signed-off-by: Simon Glass <sjg at chromium.org>
---

(no changes since v1)

 drivers/clk/rockchip/clk_rk3368.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 39caf23c31f..ea8d120738f 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -313,7 +313,7 @@ static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
 }
 #endif
 
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+#if IS_ENABLED(CONFIG_GMAC_ROCKCHIP)
 static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru, ulong set_rate)
 {
 	ulong ret;
@@ -507,7 +507,7 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rk3368_mmc_set_clk(clk, rate);
 		break;
 #endif
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+#if IS_ENABLED(CONFIG_GMAC_ROCKCHIP)
 	case SCLK_MAC:
 		/* select the external clock */
 		ret = rk3368_gmac_set_clk(priv->cru, rate);
-- 
2.39.1.519.gcb327c4b5f-goog