[PATCH v2 112/169] Correct SPL uses of NXP_FSPI

[Simon Glass]

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_NXP_FSPI defined in Kconfig

Signed-off-by: Simon Glass <sjg at chromium.org>
---

(no changes since v1)

 drivers/clk/imx/clk-imx8mm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index b5c253e4966..663b9a1bc7e 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -86,7 +86,7 @@ static const char *imx8mm_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_
 static const char *imx8mm_usdhc3_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
 					   "sys_pll3_out", "sys_pll1_266m", "audio_pll2_clk", "sys_pll1_100m", };
 
-#if CONFIG_IS_ENABLED(NXP_FSPI)
+#if IS_ENABLED(CONFIG_NXP_FSPI)
 static const char *imx8mm_qspi_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll2_333m", "sys_pll2_500m",
 					   "audio_pll2_out", "sys_pll1_266m", "sys_pll3_out", "sys_pll1_100m", };
 #endif
@@ -355,7 +355,7 @@ static int imx8mm_clk_probe(struct udevice *dev)
 	       imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0));
 #endif
 
-#if CONFIG_IS_ENABLED(NXP_FSPI)
+#if IS_ENABLED(CONFIG_NXP_FSPI)
 	clk_dm(IMX8MM_CLK_QSPI,
 	       imx8m_clk_composite("qspi", imx8mm_qspi_sels, base + 0xab80));
 	clk_dm(IMX8MM_CLK_QSPI_ROOT,
-- 
2.39.1.519.gcb327c4b5f-goog