[PATCH v2 00/17] Basic StarFive JH7110 RISC-V SoC support

[Jan Kiszka]

On 18.01.23 09:11, Yanhong Wang wrote:
> This series of patches base on the latest branch/master, and add support
> for the StarFive JH7110 RISC-V SoC and VisionFive V2 board. In order for
> this to be achieved, the respective DT nodes have been added,  and the
> required defconfigs have been added to the boards' defconfig. What is more,
> the basic required DM drivers have been added, such as reset, clock, pinctrl,
> uart, ram etc.
> 
> Note that the register base address of reset controller is same with the
> clock controller. Therefore, there is no device tree node alone for reset
> driver. It binds device node in the clock driver.
> 
> The u-boot-spl and u-boot has been tested on the VisionFive V2 boards which
> equip with JH7110 SoC and works normally.
> 
> For more information and support, you can visit RVspace wiki[1].
> 
> [1] https://wiki.rvspace.org/

I'm missing a doc/board/starfive/visionfive2.rst in this, similar to
what we did with doc/board/siemens/iot2050.rst (and many others as well).

I would also suggest adding binman support so that a flash.bin (or
however you call it) is generated that contains the completely ingrated
firmware, consisting of U-Boot SPL, OpenSBI and U-Boot proper. Would
avoid having to model the details downstream in Yocto, Isar, etc.

Jan

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