[PATCH v3 53/81] freescale: pm9g45: Fix problems with ls1021aqds_nand et al

Simon Glass sjg at chromium.org
Mon Feb 6 20:05:21 CET 2023 

These boards need to access the 'proper' symbol for NAND_BOOT, to avoid
build errors in SPL. Fix this up.

Also fix pm9g45 which has the same problem.

Drop the unnecessary condition in fdt_support.h to avoid needing to do
something clever there too.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

(no changes since v1)

 board/freescale/ls1021aqds/ls1021aqds.c | 2 +-
 include/configs/cgtqmx8.h               | 2 +-
 include/configs/imx8qm_rom7720.h        | 2 +-
 include/configs/ls1021aqds.h            | 2 +-
 include/configs/ls1043a_common.h        | 2 +-
 include/configs/ls1043aqds.h            | 4 ++--
 include/configs/ls1043ardb.h            | 4 ++--
 include/configs/ls1046a_common.h        | 2 +-
 include/configs/ls1046aqds.h            | 4 ++--
 include/configs/ls2080a_common.h        | 2 +-
 include/configs/ls2080aqds.h            | 2 +-
 include/configs/pm9g45.h                | 2 +-
 include/fdt_support.h                   | 2 +-
 13 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index d5cb7312095..4336285e288 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -184,7 +184,7 @@ int board_early_init_f(void)
 #ifdef CONFIG_SPL_BUILD
 void board_init_f(ulong dummy)
 {
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 	struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
 	u32 porsr1, pinctl;
 
diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h
index 98d4d8cf4bd..64bd5f6d3b6 100644
--- a/include/configs/cgtqmx8.h
+++ b/include/configs/cgtqmx8.h
@@ -33,7 +33,7 @@
 	"m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
 	"m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
 
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
 #else
 #define MFG_NAND_PARTITION ""
diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h
index df2cb8d9ced..df77adf7739 100644
--- a/include/configs/imx8qm_rom7720.h
+++ b/include/configs/imx8qm_rom7720.h
@@ -27,7 +27,7 @@
 	"m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
 	"m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
 
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
 #else
 #define MFG_NAND_PARTITION ""
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 451913e8fa6..58baa95d709 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -10,7 +10,7 @@
 #define CFG_SYS_INIT_RAM_ADDR	OCRAM_BASE_ADDR
 #define CFG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
 
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_NAND_U_BOOT_SIZE	(400 << 10)
 #define CFG_SYS_NAND_U_BOOT_DST	CONFIG_PPL_TEXT_BASE
 #define CFG_SYS_NAND_U_BOOT_START	CONFIG_PPL_TEXT_BASE
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index dcdd99cf714..40dbf477ecd 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -42,7 +42,7 @@
 #define CFG_SYS_NS16550_CLK          (get_serial_clock())
 
 /* NAND SPL */
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_NAND_U_BOOT_DST	CONFIG_PPL_TEXT_BASE
 #define CFG_SYS_NAND_U_BOOT_START	CONFIG_PPL_TEXT_BASE
 #endif
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 7ccbb20bf2e..0b95970bbb9 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -105,7 +105,7 @@
 #define CFG_SYS_NAND_BASE_LIST	{ CFG_SYS_NAND_BASE }
 #endif
 
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_NAND_U_BOOT_SIZE	(640 << 10)
 #endif
 
@@ -196,7 +196,7 @@
 #define CFG_SYS_CS3_FTIM2		CFG_SYS_FPGA_FTIM2
 #define CFG_SYS_CS3_FTIM3		CFG_SYS_FPGA_FTIM3
 #else
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_CSPR0_EXT		CFG_SYS_NAND_CSPR_EXT
 #define CFG_SYS_CSPR0		CFG_SYS_NAND_CSPR
 #define CFG_SYS_AMASK0		CFG_SYS_NAND_AMASK
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 60362b6a4d0..611fa510c17 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -77,7 +77,7 @@
 
 #define CFG_SYS_NAND_BASE_LIST	{ CFG_SYS_NAND_BASE }
 
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_NAND_U_BOOT_SIZE	(1024 << 10)
 #endif
 
@@ -128,7 +128,7 @@
 #define CFG_SYS_CS1_FTIM2		CFG_SYS_NAND_FTIM2
 #define CFG_SYS_CS1_FTIM3		CFG_SYS_NAND_FTIM3
 #else
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_CSPR0_EXT		CFG_SYS_NAND_CSPR_EXT
 #define CFG_SYS_CSPR0		CFG_SYS_NAND_CSPR
 #define CFG_SYS_AMASK0		CFG_SYS_NAND_AMASK
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index fb04531cb85..3f1e845fa5a 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -42,7 +42,7 @@
 #define CFG_SYS_NS16550_CLK          (get_serial_clock())
 
 /* NAND SPL */
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_NAND_U_BOOT_DST	CONFIG_PPL_TEXT_BASE
 #define CFG_SYS_NAND_U_BOOT_START	CONFIG_PPL_TEXT_BASE
 #endif
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 57c439bc562..23aac2ad92f 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -121,7 +121,7 @@
 #define CFG_SYS_NAND_BASE_LIST	{ CFG_SYS_NAND_BASE }
 #endif
 
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_NAND_U_BOOT_SIZE	(768 << 10)
 #endif
 
@@ -212,7 +212,7 @@
 #define CFG_SYS_CS3_FTIM2		CFG_SYS_FPGA_FTIM2
 #define CFG_SYS_CS3_FTIM3		CFG_SYS_FPGA_FTIM3
 #else
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_CSPR0_EXT		CFG_SYS_NAND_CSPR_EXT
 #define CFG_SYS_CSPR0		CFG_SYS_NAND_CSPR
 #define CFG_SYS_AMASK0		CFG_SYS_NAND_AMASK
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index f086b3b7bb7..b63d191b6e9 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -124,7 +124,7 @@ unsigned long long get_qixis_addr(void);
 	"mcinitcmd=fsl_mc start mc 0x580a00000"	\
 	" 0x580e00000 \0"
 
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 #define CFG_SYS_NAND_U_BOOT_DST	0x80400000
 #define CFG_SYS_NAND_U_BOOT_START	CFG_SYS_NAND_U_BOOT_DST
 #endif
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 7ad2432a775..6ea791c79ef 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -139,7 +139,7 @@
 #define CFG_SYS_CS3_FTIM3		0x0
 
 #if defined(CONFIG_SPL)
-#if defined(CONFIG_NAND_BOOT)
+#if defined(CONFIG_PPL_NAND_BOOT)
 #define CFG_SYS_CSPR1_EXT		CFG_SYS_NOR0_CSPR_EXT
 #define CFG_SYS_CSPR1		CFG_SYS_NOR0_CSPR_EARLY
 #define CFG_SYS_CSPR1_FINAL		CFG_SYS_NOR0_CSPR
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index 686411eee2e..c177eafd74e 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -34,7 +34,7 @@
 #define CFG_SYS_NAND_READY_PIN		AT91_PIN_PD3
 #endif
 
-#ifdef CONFIG_NAND_BOOT
+#ifdef CONFIG_PPL_NAND_BOOT
 /* bootstrap + u-boot + env in nandflash */
 #elif CONFIG_SD_BOOT
 /* bootstrap + u-boot + env + linux in mmc */
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 5638bd4f165..ba79f47d004 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -7,7 +7,7 @@
 #ifndef __FDT_SUPPORT_H
 #define __FDT_SUPPORT_H
 
-#if defined(CONFIG_OF_LIBFDT) && !defined(USE_HOSTCC)
+#if !defined(USE_HOSTCC)
 
 #include <asm/u-boot.h>
 #include <linux/libfdt.h>
-- 
2.39.1.519.gcb327c4b5f-goog

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