[PATCH 4/9] mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28

tkuw584924 at gmail.com tkuw584924 at gmail.com
Mon Feb 13 08:09:15 CET 2023

From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>

Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode.
Instead, it supports CLPEF(0x82) which has the same functionality as CLSR.
spansion_sr_ready() is for multi-die package parts including S28HS02GT, so
we need to use CLPEF instead of CLSR.

This change does not affect to S25x02GT which uses spansion_sr_ready() as
S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30).

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
 drivers/mtd/spi/spi-nor-core.c | 2 +-
 include/linux/mtd/spi-nor.h    | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index b7f0f3343dd4..0e4498d6f59e 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -750,7 +750,7 @@ static int spansion_sr_ready(struct spi_nor *nor, u32 addr_base, u8 dummy)
 			dev_dbg(nor->dev, "Programming Error occurred\n");
-		nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0);
+		nor->write_reg(nor, SPINOR_OP_CYPRESS_CLPEF, NULL, 0);
 		return -EIO;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index ebe38306a1d2..8a94e1203724 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -180,6 +180,7 @@
 /* For Cypress flash. */
 #define SPINOR_OP_RD_ANY_REG			0x65	/* Read any register */
 #define SPINOR_OP_WR_ANY_REG			0x71	/* Write any register */
+#define SPINOR_OP_CYPRESS_CLPEF			0x82	/* Clear P/E err flag */
 #define SPINOR_REG_CYPRESS_ARCFN		0x00000006
 #define SPINOR_REG_CYPRESS_STR1V		0x00800000
 #define SPINOR_REG_CYPRESS_CFR1V		0x00800002

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